UPD62A NEC, UPD62A Datasheet
UPD62A
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UPD62A Summary of contents
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... Infrared remote control transmitter (for AV and household electrical appliances) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. U14474EJ1V0DS00 (1st edition) ...
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ORDERING INFORMATION Part Number PD62AMC- -5A4 20-pin plastic SSOP (300 mils) Remark indicates ROM code suffix. PIN CONFIGURATION (TOP VIEW) 20-pin Plastic SSOP (300 mils) • PD62AMC- -5A4 K I/ /LED 1 REM V DD ...
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BLOCK DIAGRAM Carrier REM generator 9-bit S /LED 1 timer LIST OF FUNCTIONS Item ROM capacity 512 Mask ROM RAM capacity 32 4 bits Stack 1 level (RAM also used as RF) I/O pins • Key input (K • Key ...
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... PIN FUNCTIONS .......................................................................................................................... 1.1 List of Pin Functions ......................................................................................................................... 1.2 Pin Input/Output Circuits .................................................................................................................. 1.3 Recommended Connection of Unused Pins ................................................................................... 2. INTERNAL CPU FUNCTIONS ..................................................................................................... 2.1 Program Counter (PC) ...................................................................................................................... 2.2 Stack Pointer (SP) ............................................................................................................................. 2.3 Address Stack Register (ASR (RF)) ................................................................................................. 2.4 Program Memory (ROM) ................................................................................................................... 10 2.5 Data Memory (RAM) .......................................................................................................................... 10 2.6 Data Pointer (DP) ............................................................................................................................... 11 2.7 Accumulator (A) ................................................................................................................................ 11 2.8 Arithmetic and Logic Unit (ALU) ...................................................................................................... 12 2.9 Flags ................................................................................................................................................... 12 2.9.1 Status flag (F) .......................................................................................................................... 12 2 ...
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INSTRUCTION SET ...................................................................................................................... 30 9.1 Machine Language Output by Assembler ....................................................................................... 30 9.2 Circuit Symbol Description .............................................................................................................. 31 9.3 Mnemonic to/from Machine Language (Assembler Output) Contrast Table ............................... 32 9.4 Accumulator Operation Instructions ............................................................................................... 36 9.5 Input/Output Instructions ................................................................................................................. ...
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... LED output synchronously with the REM signal. 5 REM Infrared remote control transmission output. The output is active high. Carrier frequency Power supply DD These pins are connected to system clock ceramic 7 X OUT 8 X resonators GND Ground Normally, this pin is the system reset input ...
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Pin Input/Output Circuits The input/output circuits of the PD62A pins are shown in partially simplified forms below. ( I/O0 I/O7 Output Data latch Output disable Input buffer Note The drive capability is held low. (2) K ...
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... Recommended Connection of Unused Pins The following connections are recommended for unused pins. Table 1-1. Connections for Unused Pins Pin K Input mode I/O Output mode REM S /LED Note RESET Note For application circuits requiring high reliability, be sure to design so that the RESET signal is input externally ...
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INTERNAL CPU FUNCTIONS 2.1 Program Counter (PC): 10 Bits This is a binary counter that holds the address information of the program memory. Figure 2-1. Program Counter Configuration PC PC9 PC8 The program counter contains the address of the ...
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Program Memory (ROM): 512 steps The ROM consists of 10 bits per step, and is addressed by the program counter. The program memory stores programs and table data, etc. The 22 steps from 3EAH to 3FFH cannot be used ...
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Figure 2-4. Data Memory Configuration R (high-order 4 bits ...
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Arithmetic and Logic Unit (ALU): 4 Bits The arithmetic and logic unit (ALU), which is an arithmetic circuit consisting of 4 bits, executes simple manipulations with priority given to logical operations. 2.9 Flags 2.9.1 Status flag (F) Pin and ...
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Carry flag (CY) The carry flag is set ( the following cases: • If the ANL instruction or the XRL instruction is executed when bit 3 of the accumulator is “1” and bit 3 of the operand ...
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PORT REGISTERS (PX) The K port, the K port, the special ports (S I/O I The port register values after reset are shown below. Figure 3-1. Port Register Configuration I/O7 I/O6 I/ ...
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... Caution If a key is double-pressed, a high-level output and a low-level output may coincide at the K port. To avoid this, the low-level output current of the K I/O careful when using the K The K port is so designed that, even when connected directly to V I/O voltage range (V = 2.0 to 3.6 V), no problem may occur. DD Bit ...
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... This port is set input or output mode by means of bit 2 of the P4 register. The pin status can be read in both input and output mode. In input mode, software can be used to set whether to connect a pull-down resistor at the S in 2-bit units by means of bit 4 of the P4 register. In output mode, the pull-down resistor is automatically disconnected, and this port becomes the remote control transmission display pin (refer to 4 ...
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Control Register 0 (P3) Control register 0 consists of 8 bits. The contents that can be controlled are as shown below. When reset, this register becomes 0000 0011B. Table 3-4. Control Register 0 (P3) Bit b 7 Name — ...
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... Specifies the I/O mode of the Specifies the connection of a pull-down resistor “1” (connected Specifies the connections of a pull-down resistor “1” (connected). Remark In output mode or in OFF mode, all the pull-down resistors are automatically disconnected ...
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TIMER 4.1 Timer Configuration The timer is the block used for creating a remote control transmission pattern. As shown in Figure 4-1, it consists of a 9-bit down counter ( flag ( ...
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Timer Operation The timer starts (counting down) when a value other than 0 is set for the down counter with a timer operation instruction. The timer operation instructions for making the timer start operation are shown below: MOV T0, ...
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Carrier Output The carrier for remote-controlled transmission can be output from the REM pin by clearing (to 0) bit 2 of control register 0. As shown in Figure 4-3, in the case where the timer stops when the carrier ...
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STANDBY FUNCTION 5.1 Outline of Standby Function To save current consumption, two types of standby modes, HALT mode and STOP mode, are made available. In STOP mode, the system clock stops oscillation. At this time, the X In HALT ...
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Standby Mode Setting and Release The standby mode is set with the HALT #b standby mode to be set, the status flag (F) is required to have been cleared (to 0). The standby mode is released by the release ...
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... At this time, if the release condition is not held, the device goes into STOP mode again after the wait time has elapsed. Therefore, when releasing the STOP mode necessary to hold the release condition longer than the wait time. 24 ...
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Figure 5-2. STOP Mode Release by RESET Input HALT instruction (STOP mode) RESET Operating mode Oscillation Clock (2) HALT mode release timing Figure 5-3. HALT Mode Release by Cancelation Condition HALT instruction Standby release signal Operating mode Clock Figure 5-4. ...
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... Operating mode or standby mode The RESET pin outputs a low level when the POC circuit (mask option operation. Caution When connecting a reset IC to the RESET pin, be sure to connect the N-ch open drain output type. Table 6-1. Hardware Statuses After Reset • RESET Input During Operation Hardware • ...
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POC CIRCUIT (MASK OPTION) The POC circuit monitors the power supply voltage and applies an internal reset in the microcontroller when the battery is replaced, etc. If the application circuit satisfies the following conditions, the POC circuit can be ...
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... Whether this condition is met or not can be checked by measuring the oscillation status on a product which actually contains a POC circuit, as follows. <1> Connect a storage oscilloscope to the X <2> Connect a power supply whose output voltage can be varied and then gradually raise the power supply voltage V from 0 V (making sure to avoid V ...
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SYSTEM CLOCK OSCILLATOR The system clock oscillator configuration consists of a ceramic resonator oscillation circuit (f Ceramic resonator The system clock oscillator stops its oscillation when reset or in STOP mode. Caution When using the system clock oscillator, wire ...
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INSTRUCTION SET 9.1 Machine Language Output by Assembler The bit length of the machine language of this product is 10 bits per word. However, the machine language that is output by the assembler is extended to 16 bits per ...
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Circuit Symbol Description A: Accumulator ASR: Address Stack Register addr: Program memory address CY: Carry flag data4: 4-bit immediate data data8: 8-bit immediate data data10: 10-bit immediate data F: Status flag PC: Program Counter Pn: Port register pair (n ...
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Mnemonic to/from Machine Language (Assembler Output) Contrast Table Accumulator Operation Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word ANL A, R0n FBEn A, R1n FAEn A, @R0H FAF0 A, @R0L FBF0 A, #data4 FBF1 data4 ORL A, R0n ...
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Input/output Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word IN A, P0n FFF8 + n — A, P1n FEF8 + n — OUT P0n, A E5F8 + n — P1n, A E4F8 + n — ANL A, P0n FBF8 ...
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Branch Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word JMP addr (Page 0) E8F1 addr addr (Page 1) E9F1 addr JC addr (Page 0) ECF1 addr addr (Page 1) EAF1 addr JNC addr (Page 0) EDF1 addr addr (Page ...
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Others Instruction Code Mnemonic Operand 1st Word 2nd Word HALT #data4 E2F1 data4 STTS #data4 E3F1 data4 R0n E3En SCAF FAF3 NOP E0E0 Operation 3rd Word Standby mode If statuses match F 1 else statuses match F ...
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Accumulator Operation Instructions ANL A, R0n ANL A, R1n <1> Instruction code <2> Cycle count: 1 <3> Function: (A) CY The accumulator contents and the register Rmn contents are ANDed and the results are ...
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ORL A, R0n ORL A, R1n <1> Instruction code <2> Cycle count: 1 <3> Function: (A) ( The accumulator contents and the register Rmn contents are ORed and the results are entered in ...
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XRL A, @R0H XRL A, @R0L <1> Instruction code 0 <2> Cycle count: 1 <3> Function: (A) CY (A) CY The accumulator contents and the program memory contents specified with the ...
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Input/Output Instructions IN A, P0n IN A, P1n <1> Instruction code <2> Cycle count: 1 <3> Function: (A) (Pmn The port Pmn ...
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OUT Pn, #data8 <1> Instruction code <2> Cycle count: 1 <3> Function: (Pn) The immediate data is transferred to port Pn. In this case, port Pn ...
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MOV R0n, A MOV R1n, A <1> Instruction code <2> Cycle count: 1 <3> Function: (Rmn) The accumulator contents are transferred to register Rmn. MOV Rn, #data8 <1> Instruction code ...
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... Branch Instructions The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically performs page optimization unnecessary to designate pages. The pages allowed for each product are as follows. PD62A (ROM: 0.5 K steps): PD6P4B (PROM steps) : JMP addr <1> Instruction code: page 0 ...
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... Subroutine Instructions The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically performs page optimization unnecessary to designate pages. The pages allowed for each product are as follows. PD62A (ROM: 0.5 K steps): page 0 PD6P4B (PROM steps): page 0 CALL addr < ...
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Timer Operation Instructions MOV A, T0 MOV A, T1 <1> Instruction code 0 <2> Cycle count: 1 <3> Function: (A) CY The timer Tn contents are transferred to the accumulator. ...
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MOV T, @R0 <1> Instruction code <2> Cycle count: 1 <3> Function: (T) ((P13), (R0)) The program memory contents are transferred to the timer register T (t register P13 and ...
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STTS #data4 <1> Instruction code <2> Cycle count: 1 <3> Function: if statuses match F else F The ...
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... ASSEMBLER RESERVED WORDS 10.1 Mask Option Directives When creating the PD62A program necessary to use a mask option directive in the assembler’s source program to specify a mask option. 10.1.1 OPTION and ENDOP directives The assembler directives from the OPTION directive to the ENDOP directive are called the mask option definition block ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (T = +25˚C) A Parameter Symbol Power supply voltage V DD Input voltage I/O Output voltage V O Note Output current, high I REM OH LED One K Total of LED ...
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DC Characteristics (T = –40 to +85˚ Parameter Symbol Input voltage, high V RESET IH1 V K IH2 I IH3 I Input voltage, low V RESET IL1 V K IL2 I ...
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AC Characteristics (T = –40 to +85˚ Parameter Symbol Instruction execution time high-level width When releasing standby mode RESET low-level width t RSL Note 10 + ...
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... Unnecessary (C-containing type) 3. Unnecessary (C-containing type) 3. Unnecessary (C-containing type) 3. Unnecessary (C-containing type) 3. Unnecessary (C-containing type) 4 Unnecessary (C-containing type) 6 Unnecessary (C-containing type) 8 Unnecessary (C-containing type OUT C1 C2 Data Sheet U14474EJ1V0DS00 PD62A Remark MAX. 3.6 51 ...
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CHARACTERISTICS CURVES (REFERENCE VALUES ( MHz 0.9 0.8 0.7 0.6 Operating mode 0.5 HALT mode 0.4 0.3 0.2 0.1 0 1.5 2 2.5 3 Power supply voltage V [V] DD ...
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... Remote-control transmitter (48 keys accommodated) K I/ /LED 1 REM OUT X IN GND RESET Remark When the POC circuit of the mask option is used effectively not necessary to connect the capacitor enclosed in the broken lines. K I/O5 K I/O4 K I/O3 K I/O2 K I/ ...
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PACKAGE DRAWINGS 20 PIN PLASTIC SSOP (300 mil NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. Remark The dimensions and materials of ...
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... The PD62A should be soldered and mounted under the following recommended conditions. For the details of the recommended soldering conditions, refer to the document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than those recommended below, contact your NEC sales representa- tives. Table 15-1. Surface Mounting Type Soldering Conditions ...
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APPENDIX A. DEVELOPMENT TOOLS An emulator is provided for emulating the PD62A. Hardware Note • Emulator (EB-6133 ) Used to emulate the PD62A. Note This is a product made by Naito Densei Machida Mfg. Co., Ltd. For details, contact Naito ...
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APPENDIX B. FUNCTIONAL COMPARISON BETWEEN PD62A AND OTHER SUBSERIES Item PD62A ROM capacity 512 10 bits RAM capacity 32 4 bits Stack 1 level (also used RAM) Key matrix keys S (S-IN) input ...
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... APPENDIX C. EXAMPLE OF REMOTE-CONTROL TRANSMISSION FORMAT (NEC transmission format in command one-shot transmission mode) Caution When using the NEC transmission format, apply for a custom code at NEC. (1) REM output waveform (From <2>, the output is made only when the key is continually pressed.) REM output 58.5 to 76.5 ms < 1 > ...
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... Leader code Custom code Caution To prevent malfunction with other systems when receiving data in the NEC transmission format, not only fully decode (make sure to check Data code as well) the total 32 bits of the 16-bit custom codes (Custom code, Custom code’) and the 16-bit data codes (Data code, Data code) but also check to make sure that no signals exist ...
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... HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry ...
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... Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify: • Device availability • Ordering information • ...
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... The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited without governmental license, the need for which must be judged by the customer. The export or re-export of this product from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative. ...