IBM25PPC440GX IBM Microelectronics, IBM25PPC440GX Datasheet
IBM25PPC440GX
Related parts for IBM25PPC440GX
IBM25PPC440GX Summary of contents
Page 1
PowerPC 440GX Embedded Processor Data Sheet Features ® • PowerPC 440 processor core operating up to 800MHz with 32KB I- and D-caches (with parity checking) • On-chip 256KB SRAM configurable as L2 Code store or Ethernet Packet store memory • ...
Page 2
Preliminary PowerPC 440GX Embedded Processor Data Sheet Contents Ordering and PVR Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 3
PowerPC 440GX Embedded Processor Data Sheet Figures PPC440GX Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 4
... IBM25PPC440GX-3CB533C PPC440GX IBM25PPC440GX-3CB667C PPC440GX IBM25PPC440GX-3CB800C Notes: 1. These part numbers (Rev A) are prototype parts that are intended to be used only for evaluation purposes. Only revision level B parts will be available for production use. Each part number contains a revision code. This is the die mask revision number and is included in the part number for identification purposes only ...
Page 5
... Processor Local Bus (PLB) I2O Messaging 133MHz max The PPC440GX is designed using the IBM Microelectronics Blue Logic functional blocks are integrated together to create an application-specific product (ASIC). This approach provides a consistent way to create complex ASICs using IBM CoreConnect Bus Note: IBM CoreConnect buses provide: • ...
Page 6
Preliminary PowerPC 440GX Embedded Processor Data Sheet System Memory Address Map Function DDR SDRAM SRAM 1 Local Memory Reserve IMU EBC Reserved UART0 Reserved UART1 Reserved IIC0 Reserved IIC1 Reserved OPB Arbiter Reserved Internal Peripherals GPIO Controller Ethernet PHY ZMII ...
Page 7
PowerPC 440GX Embedded Processor Data Sheet DCR Address Map 4KB of Device Configuration Registers Function 1 Total DCR Address Space By function: Reserved Clocking Power On Reset System DCRs Memory Controller External Bus Controller External Bus Master I/F PLB Performance ...
Page 8
Preliminary PowerPC 440GX Embedded Processor Data Sheet PowerPC 440 Processor Core The PowerPC 440 processor core is designed for high-end applications: RAID controllers, SAN, ISCSI, routers, switches, printers, set-top boxes, etc the first processor core to implement the ...
Page 9
PowerPC 440GX Embedded Processor Data Sheet – Processor:bus clock ratios of N:1 and N:2 • OPB – Dynamic bus sizing 32-, 16-, and 8-bit data path – 36-bit address – 83.33MHz, maximum 333MB/s • DCR – 32-bit data path – ...
Page 10
Preliminary PowerPC 440GX Embedded Processor Data Sheet • Simple message passing capability • Asynchronous to the PLB • PCI Power Management 1.1 • PCI register set addressable both from on-chip processor and PCI device sides • Ability to boot from ...
Page 11
PowerPC 440GX Embedded Processor Data Sheet • External master interface – Write posting from external master – Read prefetching on PLB for external master reads – Bursting capable from external master – Allows external master access to all non-EBC PLB ...
Page 12
Preliminary PowerPC 440GX Embedded Processor Data Sheet Serial Port Features include: • One 8-pin UART and one 4-pin UART interface provided • Selectable internal or external serial clock to allow wide range of baud rates • Register compatibility with 16750 ...
Page 13
PowerPC 440GX Embedded Processor Data Sheet Universal Interrupt Controller (UIC) Four Universal Interrupt Controllers (UIC) are available. They provide control, status, and communications necessary between the external and internal sources of interrupts and the on-chip PowerPC processor. Note: Processor specific ...
Page 14
Preliminary PowerPC 440GX Embedded Processor Data Sheet 25mm, 552-Ball CBGA Package Top View A1 Corner Note: All dimensions are in mm. Bottom View 25.0 ± 0 ...
Page 15
PowerPC 440GX Embedded Processor Data Sheet Signal Lists The following table lists all the external signals in alphabetical order and shows the ball (pin) number on which the signal appears. Multiplexed signals are shown with the default signal (following reset) ...
Page 16
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name DMAAck0 DMAAck1 DMAAck2[GMCRxD0, GMC0RxD0, TBIRxD0, RTBI0RxD0] DMAAck3[GMCRxD1, GMC0RxD1, TBIRxD1, RTBI0RxD1] DMAReq0 DMAReq1 DMAReq2[GMCRxDV, GMC0RxCtl, TBIRxD8, RTBI0RxD4] DMAReq3[GMCTxEn, GMC0TxCtl, TBITxD8, RTBI0TxD4] DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 ...
Page 17
PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name EMCRxErr, EMC0RxErr, GMCTxD6, GMC1TxD2, TBITxD6, RTBI1TxD2 EMCTxClk, EMCRefClk EMCTxD0, EMC0TxD0, EMC0TxD EMCTxD1, EMC0TxD1, EMC1TxD EMCTxD2, EMC1TxD0, EMC2TxD, GMCTxD2, GMC0TxD2, TBITxD2, RTBI0TxD2 EMCTxD3, EMC1TxD1, EMC3TxD, GMCTxD3, GMC0TxD3, TBITxD3, RTBI0TxD3 EMCTxEn, ...
Page 18
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name [GMCTxEn, GMC0TxCtl, TBITxD8, RTBI0TxD4]DMAReq3 [GMCTxClk, TBIRxClk1]GPIO11 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND ...
Page 19
PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND ...
Page 20
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name [GPIO00]IRQ00 [GPIO01]IRQ01 [GPIO02]IRQ02 [GPIO03]IRQ03 [GPIO04]IRQ04 [GPIO05]IRQ05 [GPIO06]IRQ06 [GPIO07]IRQ07 [GPIO08]IRQ08 [GPIO09]IRQ09 [GPIO10]IRQ10 GPIO11[GMCTxClk, TBIRxClk1] [GPIO12]UART1_Rx [GPIO13]UART1_Tx [GPIO14]UART1_DSR/CTS [GPIO15]UART1_RTS/DTR [GPIO16]IIC1SClk [GPIO17]IIC1SDA [GPIO18]TrcBS0[IRQ13] [GPIO19]TrcBS1[IRQ14] [GPIO20]TrcBS2[IRQ15] [GPIO21]TrcES0[IRQ16] [GPIO22]TrcES1[IRQ17] [GPIO23]TrcES2 [GPIO24]TrcES3 [GPIO25]TrcES4 [GPIO26]TrcTS0 ...
Page 21
PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name IRQ00[GPIO00] IRQ01[GPIO01] IRQ02[GPIO02] IRQ03[GPIO03] IRQ04[GPIO04] IRQ05[GPIO05] IRQ06[GPIO06] IRQ07[GPIO07] IRQ08[GPIO08] IRQ09[GPIO09] IRQ10[GPIO10] [IRQ11]PCIReq1 [IRQ12]PCIGnt1 [IRQ13][GPIO18]TrcBS0 [IRQ14][GPIO19]TrcBS1 [IRQ15][GPIO20]TrcBS2 [IRQ16][GPIO21]TrcES0 [IRQ17][GPIO22]TrcES1 MemAddr00 MemAddr01 MemAddr02 MemAddr03 MemAddr04 MemAddr05 MemAddr06 MemAddr07 MemAddr08 MemAddr09 MemAddr10 ...
Page 22
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name MemData00 MemData01 MemData02 MemData03 MemData04 MemData05 MemData06 MemData07 MemData08 MemData09 MemData10 MemData11 MemData12 MemData13 MemData14 MemData15 MemData16 MemData17 MemData18 MemData19 MemData20 MemData21 MemData22 MemData23 MemData24 MemData25 MemData26 MemData27 ...
Page 23
PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name MemData32 MemData33 MemData34 MemData35 MemData36 MemData37 MemData38 MemData39 MemData40 MemData41 MemData42 MemData43 MemData44 MemData45 MemData46 MemData47 MemData48 MemData49 MemData50 MemData51 MemData52 MemData53 MemData54 MemData55 MemData56 MemData57 MemData58 MemData59 MemData60 ...
Page 24
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name No ball No ball No ball No ball No ball No ball No ball No ball No ball No ball No ball No ball No ball No ball ...
Page 25
PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name ...
Page 26
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name PCIXAD00 PCIXAD01 PCIXAD02 PCIXAD03 PCIXAD04 PCIXAD05 PCIXAD06 PCIXAD07 PCIXAD08 PCIXAD09 PCIXAD10 PCIXAD11 PCIXAD12 PCIXAD13 PCIXAD14 PCIXAD15 PCIXAD16 PCIXAD17 PCIXAD18 PCIXAD19 PCIXAD20 PCIXAD21 PCIXAD22 PCIXAD23 PCIXAD24 PCIXAD25 PCIXAD26 PCIXAD27 ...
Page 27
PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name PCIXAD32 PCIXAD33 PCIXAD34 PCIXAD35 PCIXAD36 PCIXAD37 PCIXAD38 PCIXAD39 PCIXAD40 PCIXAD41 PCIXAD42 PCIXAD43 PCIXAD44 PCIXAD45 PCIXAD46 PCIXAD47 PCIXAD48 PCIXAD49 PCIXAD50 PCIXAD51 PCIXAD52 PCIXAD53 PCIXAD54 PCIXAD55 PCIXAD56 PCIXAD57 PCIXAD58 PCIXAD59 PCIXAD60 ...
Page 28
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name PCIXGnt0 PCIXGnt1[IRQ12] PCIXGnt2 PCIXGnt3 PCIXGnt4 PCIXGnt5 PCIXIDSel PCIXINT PCIXIRDY PCIXM66En PCIXParHigh PCIXParLow PCIXPErr PCIXReq0 PCIXReq1[IRQ11] PCIXReq2 PCIXReq3 PCIXReq4 PCIXReq5 PCIXReq64 PCIXReset PCIXSErr PCIXStop PCIXTRDY Page ...
Page 29
PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name PerAddr00 PerAddr01 PerAddr02 PerAddr03 PerAddr04 PerAddr05 PerAddr06 PerAddr07 PerAddr08 PerAddr09 PerAddr10 PerAddr11 PerAddr12 PerAddr13 PerAddr14 PerAddr15 PerAddr16 PerAddr17 PerAddr18 PerAddr19 PerAddr20 PerAddr21 PerAddr22 PerAddr23 PerAddr24 PerAddr25 PerAddr26 PerAddr27 PerAddr28 ...
Page 30
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name PerData00 PerData01 PerData02 PerData03 PerData04 PerData05 PerData06 PerData07 PerData08 PerData09 PerData10 PerData11 PerData12 PerData13 PerData14 PerData15 PerData16 PerData17 PerData18 PerData19 PerData20 PerData21 PerData22 PerData23 PerData24 PerData25 PerData26 PerData27 ...
Page 31
PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name RAS [RcvrInh]PerReady RefVEn SysClk SysErr SysReset TCK TDI TDO TestEn TmrClk ...
Page 32
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name TrcTS6[GMCCrS, GMC1TxClk, RTBI1TxClk] TrcTS6[PerErr] TRST UART0_CTS UART0_DCD UART0_DSR UART0_DTR UART0_RI UART0_RTS UART0_Rx UART0_Tx UART1_DSR/CTS[GPIO14] UART1_RTS/DTR[GPIO15] UART1_Rx[GPIO12] UART1_Tx[GPIO13] UARTSerClk Page (Part 18 of 19) Ball Interface ...
Page 33
PowerPC 440GX Embedded Processor Data Sheet Signals Listed Alphabetically Signal Name ...
Page 34
Preliminary PowerPC 440GX Embedded Processor Data Sheet In the following table, only the primary (default) signal name is shown for each pin. Multiplexed or multifunction signals are marked with an asterisk (*). To determine what signals or functions are multiplexed ...
Page 35
PowerPC 440GX Embedded Processor Data Sheet Signals Listed by Ball Assignment Ball Signal Name Ball E01 EMCRxD1 * F01 E02 PCIXAD40 F02 E03 PCIXClk F03 E04 PCIXAD49 F04 E05 UART1_RTS/DTR * F05 E06 PCIXAD56 F06 E07 PCIXAD60 F07 E08 PCIXAD63 ...
Page 36
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed by Ball Assignment Ball Signal Name Ball J01 AGND K01 J02 EMCRxClk * K02 J03 EMCTxD3 * K03 J04 EMCTxD2 * K04 J05 PCIXAD37 K05 J06 EMCTxClk * K06 J07 EMCCD ...
Page 37
PowerPC 440GX Embedded Processor Data Sheet Signals Listed by Ball Assignment Ball Signal Name Ball N01 PerAddr08 P01 N02 GND P02 N03 PerAddr28 P03 V N04 P04 DD N05 DMAAck0 P05 N06 GND P06 N07 PerReady * P07 OV N08 ...
Page 38
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signals Listed by Ball Assignment Ball Signal Name Ball U01 TmrClk V01 U02 GND V02 U03 PerCS7 V03 OV U04 V04 DD U05 MemData63 V05 U06 GND V06 U07 MemData57 V07 V U08 ...
Page 39
PowerPC 440GX Embedded Processor Data Sheet Signals Listed by Ball Assignment Ball Signal Name Ball AA01 MemData48 AB01 AA02 GND AB02 AA03 MemData49 AB03 V AA04 AB04 DD AA05 DQS8 AB05 AA06 GND AB06 AA07 DM5 AB07 SV AA08 AB08 ...
Page 40
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signal Description The PPC440GX embedded controller is packaged in a 552-ball ceramic ball grid array (CBGA). The following tables describe the package level pinout. Pin Summary Signal pins, non-multiplexed Signal pins, multiplexed In ...
Page 41
PowerPC 440GX Embedded Processor Data Sheet Signal Functional Description Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3kΩ to 3.3V) 3. Must pull down (recommended value is 1kΩ not used, must pull up ...
Page 42
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signal Functional Description Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3kΩ to 3.3V) 3. Must pull down (recommended value is 1kΩ not used, must pull ...
Page 43
PowerPC 440GX Embedded Processor Data Sheet Signal Functional Description Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3kΩ to 3.3V) 3. Must pull down (recommended value is 1kΩ not used, must pull up ...
Page 44
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signal Functional Description Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3kΩ to 3.3V) 3. Must pull down (recommended value is 1kΩ not used, must pull ...
Page 45
PowerPC 440GX Embedded Processor Data Sheet Signal Functional Description Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3kΩ to 3.3V) 3. Must pull down (recommended value is 1kΩ not used, must pull up ...
Page 46
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signal Functional Description Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3kΩ to 3.3V) 3. Must pull down (recommended value is 1kΩ not used, must pull ...
Page 47
PowerPC 440GX Embedded Processor Data Sheet Signal Functional Description Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3kΩ to 3.3V) 3. Must pull down (recommended value is 1kΩ not used, must pull up ...
Page 48
Preliminary PowerPC 440GX Embedded Processor Data Sheet Signal Functional Description Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3kΩ to 3.3V) 3. Must pull down (recommended value is 1kΩ not used, must pull ...
Page 49
PowerPC 440GX Embedded Processor Data Sheet Absolute Maximum Ratings The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. None of the performance specification contained in this ...
Page 50
Preliminary PowerPC 440GX Embedded Processor Data Sheet Heat Sink Mounting Information Proper thermal design is primarily dependent upon multiple system-level effects; that is, the effects of the heat sink, the air flow, and the thermal interface material. To reduce the ...
Page 51
PowerPC 440GX Embedded Processor Data Sheet Recommended DC Operating Conditions Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended conditions can affect device reliability. Parameter Logic Supply Voltage (500MHz Rev A and 533MHz) Logic Supply ...
Page 52
Preliminary PowerPC 440GX Embedded Processor Data Sheet Input Capacitance Parameter Group 1 (2.5V SSTL I/O) Group 2 (3.3V LVTTL I/O) Group 3 (PCI-X I/O) Group 4 (Receivers) Group 5 (3.3V tolerant CMOS I/O) DC Power Supply Loads Parameter V (1.5V) ...
Page 53
PowerPC 440GX Embedded Processor Data Sheet Clocking Specifications Symbol Parameter SysClk Input F Frequency C T Period C T Edge stability CS T High time CH T Low time CL ≥ Note: Input slew rate 1V/ns PLL VCO F Frequency ...
Page 54
Preliminary PowerPC 440GX Embedded Processor Data Sheet Spread Spectrum Clocking Care must be taken when using a spread spectrum clock generator (SSCG) with the PPC440GX. This controller uses a PLL for clock generation inside the chip. The accuracy with which ...
Page 55
PowerPC 440GX Embedded Processor Data Sheet Peripheral Interface Clock Timings Parameter PCIXClk input frequency (asynchronous mode) PCIXClk period (asynchronous mode) PCIXClk input high time PCIXClk input low time EMCMDClk output frequency EMCMDClk period EMCMDClk output high time EMCMDClk output low ...
Page 56
Preliminary PowerPC 440GX Embedded Processor Data Sheet Input Setup and Hold Waveform Clock Inputs Output Delay and Float Timing Waveform Clock max min Outputs OH High (Drive) Float (High-Z) Low (Drive) Page min ...
Page 57
PowerPC 440GX Embedded Processor Data Sheet I/O Specifications—All Speeds Notes: 1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard. 2. PCI-X timings are for asynchronous operation up to 133MHz. PCI-X input setup time requirement is 1.2ns for ...
Page 58
Preliminary PowerPC 440GX Embedded Processor Data Sheet I/O Specifications—All Speeds Notes: 1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard. 2. PCI-X timings are for asynchronous operation up to 133MHz. PCI-X input setup time requirement is 1.2ns ...
Page 59
PowerPC 440GX Embedded Processor Data Sheet I/O Specifications—All Speeds Notes: 1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard. 2. PCI-X timings are for asynchronous operation up to 133MHz. PCI-X input setup time requirement is 1.2ns for ...
Page 60
Preliminary PowerPC 440GX Embedded Processor Data Sheet I/O Specifications—All Speeds Notes: 1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard. 2. PCI-X timings are for asynchronous operation up to 133MHz. PCI-X input setup time requirement is 1.2ns ...
Page 61
PowerPC 440GX Embedded Processor Data Sheet I/O Specifications—All Speeds Notes: 1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard. 2. PCI-X timings are for asynchronous operation up to 133MHz. PCI-X input setup time requirement is 1.2ns for ...
Page 62
Preliminary PowerPC 440GX Embedded Processor Data Sheet I/O Specifications—500MHz–800MHz Notes: 1. PerClk rising edge at package pin with a 10pF load trails the internal PLB clock by approximately 1.3ns. Input (ns) Signal Setup Time Hold Time (T min ...
Page 63
PowerPC 440GX Embedded Processor Data Sheet DDR SDRAM I/O Specifications The DDR SDRAM controller times its operation with internal PLB clock signals and generates MemClkOut0 from the PLB clock. The PLB clock is an internal signal that cannot be directly ...
Page 64
Preliminary PowerPC 440GX Embedded Processor Data Sheet DDR SDRAM Output Driver Specifications Signal Path Write Data MemData00:07 MemData08:15 MemData16:23 MemData24:31 MemData32:39 MemData40:47 MemData48:55 MemData56:63 ECC0:7 DM0:8 MemClkOut0 MemAddr00:12 BA0:1 RAS CAS WE BankSel0:3 ClkEn0:3 DQS0:8 Page Output ...
Page 65
PowerPC 440GX Embedded Processor Data Sheet DDR SDRAM Write Operation The following diagram illustrates the relationship among the signals involved with a DDR write operation. DDR SDRAM Write Cycle Timing PLB Clk MemClkOut0 MemClkOut0(90) Addr/Cmd DQS MemData T = Delay ...
Page 66
Preliminary PowerPC 440GX Embedded Processor Data Sheet I/O Timing—DDR SDRAM T Notes: 1. All of the DQS signals are referenced to MemClkOut0(0). 2. Clock speed is 166MHz. 3. The T values in the table include 3 cycle at ...
Page 67
PowerPC 440GX Embedded Processor Data Sheet I/O Timing—DDR SDRAM T Notes and T are measured under worst case conditions Clock speed for the values in the table is 166MHz. 3. The time values in the ...
Page 68
Preliminary PowerPC 440GX Embedded Processor Data Sheet In operation, following the receipt of an address and read command from the PPC440GX, the SDRAM generates data and the DQS signals coincident with MemClkOut0. The data is latched into the PPC440GX using ...
Page 69
PowerPC 440GX Embedded Processor Data Sheet Example 1: If the data-to-PLB clock timing is as shown in the example below, then the read clock is not delayed and the Stage 1 data is sampled at (1). Except for small, low ...
Page 70
Preliminary PowerPC 440GX Embedded Processor Data Sheet Example 2: In this example Read Clock is delayed almost 1/2 cycle. Without ECC, Stage 2 data can be sampled at (2). If ECC is enabled, Stage 3 data must be sampled (see ...
Page 71
PowerPC 440GX Embedded Processor Data Sheet Example 3: In this example, ECC is enabled. This requires that Stage 3 data be sampled at (3). If ECC is disabled, the system will still work, but there will be more latency before ...
Page 72
Preliminary PowerPC 440GX Embedded Processor Data Sheet Initialization The PPC440GX provides the option for setting initial parameters based on default values or by reading them from a slave PROM attached to the IIC0 bus (see “EEPROM” below). Some of the ...
Page 73
PowerPC 440GX Embedded Processor Data Sheet Revision Log Date 08/07/2002 Add revision log. Change EMC0:1TxD0:1 and EMC0:1TxEn T 08/30/2002 09/25/2002 Update for L2 cache 10/22/2002 Add heat sink mounting information . 11/20/2002 Update I/O timing data. Update PCI-X I/O voltage ...
Page 74
... IBM Microelectronics Division 1580 Route 52 Hopewell Junction, NY 12533-6351 The IBM home page is www. ibm.com. The IBM Microelectronics Division home page is www.chips.ibm.com. SA14-2685-08 74 ® PowerPC ...