GS8161Z18 GSI [GSI Technology], GS8161Z18 Datasheet - Page 4

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GS8161Z18

Manufacturer Part Number
GS8161Z18
Description
18Mb Pipelined and Flow Through Synchronous NBT SRAM
Manufacturer
GSI [GSI Technology]
Datasheet

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100-Pin TQFP Pin Descriptions
Rev: 2.15 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Symbol
A
V
ADV
CKE
DQ
DQ
TMS
TDO
TCK
LBO
DQ
DQ
V
V
TDI
CK
NC
0
B
B
B
B
ZZ
FT
DDQ
W
E
E
E
A
G
, A
DD
SS
A
B
C
D
1
2
3
A
B
C
D
1
Type
I/O
I/O
I/O
I/O
In
In
In
In
In
In
In
In
In
In
In
In
In
In
O
In
In
In
In
In
In
I
I
I
Chip Enable—Active High. For self decoded depth expansion
Chip Enable—Active Low. For self decoded depth expansion
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
4/36
Advance/Load; Burst address counter control pin
Pipeline/Flow Through Mode Control; active low
Burst Address Inputs; Preload the burst counter
Clock Input Buffer Enable; active low
Byte A Data Input and Output pins
Byte B Data Input and Output pins
Byte C Data Input and Output pins
Byte D Data Input and Output pins
GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D)
Power down control; active high
Linear Burst Order; active low.
Output driver power supply
Output Enable; active low
Write Enable; active low
Chip Enable; active low
Scan Test Mode Select
Scan Test Data Out
Core power supply
Clock Input Signal
Scan Test Data In
Scan Test Clock
Description
Address Inputs
No Connect
Ground
C1
D1
A1
B1
–DQ
–DQ
–DQ
–DQ
A9
B9
C9
D9
; active low
; active low
; active low
; active low
© 1998, GSI Technology

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