LTM4601 LINER [Linear Technology], LTM4601 Datasheet - Page 10

• Manufacturer Part Number: LTM4601
• Description: 12A DC/DC ?Modules with PLL, Output Tracking and Margining
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LTM4601/LTM4601-1
The typical LTM4601 application circuit is shown in
Figure 18. External component selection is primarily
determined by the maximum load current and output
voltage. Refer to Table 2 for specifi c external capacitor
requirements for a particular application.
V
There are restrictions in the maximum V
down ratio that can be achieved for a given input voltage.
These constraints are shown in the Typical Performance
Characteristics curves labeled V
Ratio. Note that additional thermal derating may apply. See
the Thermal Considerations and Output Current Derating
section of this data sheet.
Output Voltage Programming and Margining
The PWM controller has an internal 0.6V reference voltage.
As shown in the Block Diagram, a 1M and a 60.4k 0.5%
internal feedback resistor connects V
together. The V
and the 60.4k resistor. The 1M resistor is used to protect
against an output overvoltage condition if the V
pin is not connected to the output, or if the remote sense
amplifi er output is not connected to V
voltage will default to 0.6V. Adding a resistor R
the V
Table 1. Standard 1% Resistor Values
10
V
R
(kΩ)
IN
(V)
OUT
SET
V
to V
OUT
FB
Open
OUT
pin to SGND pin programs the output voltage:
0.6
=
0 6
.
Step-Down Ratios
60.4
V
1.2
OUT_LCL
60 4
.
U
R
40.2
1.5
k R
SET
+
pin is connected between the 1M
U
SET
30.1
1.8
25.5
IN
2
W
to V
OUT_LCL
OUT
19.1
2.5
IN
OUT
and V
and V
. The output
13.3
Step-Down
3.3
U
SET
OUT
OUT_LCL
FB
from
8.25
step
pins
5
The MPGM pin programs a current that when multiplied
by an internal 10k resistor sets up the 0.6V reference ±
offset for margining. A 1.18V reference divided by the
RPGM resistor on the MPGM pin programs the current.
Calculate V
where %V
and V
where RPGM is the resistor value to place on the MPGM
pin to ground.
The output margining will be ± margining of the value.
This is controlled by the MARG0 and MARG1 pins. See
the truth table below:
Input Capacitors
LTM4601 module should be connected to a low AC imped-
ance DC source. Input capacitors are required to be placed
adjacent to the module. In Figure 18, the 10µF ceramic
input capacitors are selected for their ability to handle
the large RMS current into the converter. An input bulk
capacitor of 100µF is optional. This 100µF capacitor is only
needed if the input source impedance is compromised by
long inductive leads or traces.
R
V
OUT MARGIN
PGM
OUT(MARGIN)
MARG0
HIGH
HIGH
LOW
LOW
(
=
OUT
OUT(MARGIN)
V
0 6
OUT
.
is the percentage of V
V
)
=
•
is the margin quantity in volts:
V
%
OUT MARGIN
100
V
1 18
OUT
:
.
(
MARG1
HIGH
HIGH
LOW
LOW
V
•
V
OUT
)
•
OUT
10
k
you want to margin,
MARGIN DOWN
NO MARGIN
MARGIN UP
NO MARGIN
MODE
4601f