LTM4601 LINER [Linear Technology], LTM4601 Datasheet - Page 19

• Manufacturer Part Number: LTM4601
• Description: 12A DC/DC ?Modules with PLL, Output Tracking and Margining
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
for the noted conditions. These equivalent θ
are correlated to the measured values, and are improved
with air fl ow. The case temperature is maintained at 100°C
or below for the derating curves. The maximum case
temperature of 100°C is to allow for a rise of about 13°C
to 25°C inside the µModule with a thermal resistance θ
from junction to case between 6°C/W to 9°C/W. This will
maintain the maximum junction temperature inside the
µModule below 125°C.
Safety Considerations
The LTM4601 modules do not provide isolation from
V
slow blow fuse with a rating twice the maximum input
current needs to be provided to protect each unit from
catastrophic failure.
Layout Checklist/Example
The high integration of LTM4601 makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
IN
to V
OUT
. There is no internal fuse. If required, a
U
U
V
GND
V
OUT
IN
W
C
OUT
C
IN
JA
C
Figure 15. Recommended Layout
OUT
parameters
C
IN
U
JC
• Use large PCB copper areas for high current path, in-
• Place high frequency ceramic input and output capaci-
• Place a dedicated power ground layer underneath the
• To minimize the via conduction loss and reduce module
• Do not put vias directly on pads.
• Use a separated SGND ground copper area for com-
Figure 15 gives a good example of the recommended
layout.
cluding V
PCB conduction loss and thermal stress.
tors next to the V
high frequency noise.
unit. Refer frequency synchronization source to power
ground.
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
4601 F15
IN
, PGND and V
LTM4601/LTM4601-1
SIGNAL
GND
IN
, PGND and V
OUT
. It helps to minimize the
OUT
pins to minimize
19
4601f