LF2301 LODEV [LOGIC Devices Incorporated], LF2301 Datasheet - Page 16

• Manufacturer Part Number: LF2301
• Description: Image Resampling Sequencer
• Manufacturer: LODEV [LOGIC Devices Incorporated]

DEVICES INCORPORATED
1. Maximum Ratings indicate stress
specifications only. Functional oper-
ation of these products at values beyond
those indicated in the Operating Condi-
tions table is not implied. Exposure to
maximum rating conditions for ex-
tended periods may affect reliability.
2. The products described by this spec-
ification include internal circuitry de-
signed to protect the chip from damag-
ing substrate injection currents and ac-
cumulations of static charge. Neverthe-
less, conventional precautions should
be observed during storage, handling,
and use of these circuits in order to
avoid exposure to excessive electrical
stress values.
3. This device provides hard clamping of
transient undershoot and overshoot. In-
put levels below ground or above V
will be clamped beginning at –0.6 V and
V
indefinite operation with inputs in the
range of –0.5 V to +7.0 V. Device opera-
tion will not be adversely affected, how-
ever, input current levels will be well in
excess of 100 mA.
4. Actual test conditions may vary from
those designated but operation is guar-
anteed as specified.
5. Supply current for a given applica-
tion can be accurately approximated by:
where
6. Tested with no output load at
15 MHz clock rate.
7. Tested with all inputs within 0.1 V of
V
8. These parameters are guaranteed
but not 100% tested.
NOTES
N = total number of device outputs
C = capacitive load per output
V = supply voltage
F = clock frequency
CC
CC
or Ground, no load.
+ 0.6 V. The device can withstand
NCV F
4
2
CC
9. AC specifications are tested with
input transition times less than 3 ns,
output reference levels of 1.5 V (except
t
0 to 3.0 V. Output loading may be a
resistive divider which provides for
specified I
voltage of V
respectively. Alternatively, a diode
bridge with upper and lower current
sources of I
and a balancing voltage of 1.5 V may be
used. Parasitic capacitance is 30 pF
minimum, and may be distributed.
This device has high-speed outputs ca-
pable of large instantaneous current
pulses and fast turn-on/turn-off times.
As a result, care must be exercised in the
testing of this device. The following
measures are recommended:
a. A 0.1 µF ceramic capacitor should be
installed between V
leads as close to the Device Under Test
(DUT) as possible. Similar capacitors
should be installed between device V
and the tester common, and device
ground and tester common.
b. Ground and V
must be brought directly to the DUT
socket or contactor fingers.
c. Input voltages should be adjusted to
compensate for inductive ground and
V
put levels relative to the DUT ground pin.
10. Each parameter is shown as a mini-
mum or maximum value. Input require-
ments are specified from the point of
view of the external system driving the
chip. Setup time, for example, is specified
as a minimum since the external system
must supply at least that much time to
meet the worst-case requirements of all
parts. Responses from the internal cir-
cuitry are specified from the point of view
of the device. Output delay, for example,
is specified as a maximum since worst-
case operation of any device always pro-
vides data within that time.
DIS
CC
test), and input levels of nominally
noise to maintain required DUT in-
OH
OH
OH
and I
and I
2-16
min and V
CC
OL
CC
OL
supply planes
at an output
respectively,
and Ground
OL
max
Image Resampling Sequencer
CC
11. For the t
measured to the 1.5 V crossing point
with datasheet loads. For the t
the transition is measured to the
±200mV level from the measured
steady-state output voltage with
±10mA loads. The balancing volt-
age, V
and 0-to-Z tests, and set at 0 V for Z-
to-1 and 1-to-Z tests.
12. These parameters are only tested at
the high temperature extreme, which is
the worst case for leakage current.
DUT
Z
Z
F
F
IGURE
OE
IGURE
Video Imaging Products
0
1
V
V
OL
OH
*
*
TH
Measured V
Measured V
A. O
C
1.5 V
t
, is set at 3.5 V for Z-to-0
L
B. T
ENA
ENA
S1
UTPUT
1.5 V
1.5 V
OL
OH
HRESHOLD
with I
with I
test, the transition is
OH
OH
V
V
OH
= –10mA and I
L
OL
= –10mA and I
1.5 V
*
*
OADING
08/16/2000–LDS.2301-H
I
OH
0.2 V
0.2 V
t
DIS
L
LF2301
OL
OL
EVELS
= 10mA
C
= 10mA
V
DIS
TH
IRCUIT
3.5V Vth
0
1
0V Vth
test,
I
Z
Z
OL