AM29LV320MT AMD [Advanced Micro Devices], AM29LV320MT Datasheet

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AM29LV320MT

Manufacturer Part Number
AM29LV320MT
Description
32 Megabit (2 M x 16-Bit/4 M x 8-Bit) MirrorBit 3.0 Volt-only Boot Sector Flash Memory
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

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Am29LV320MT/B
32 Megabit (2 M x 16-Bit/4 M x 8-Bit) MirrorBit
3.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
PERFORMANCE CHARACTERISTICS
This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Single power supply operation
— 3 V for read, erase, and program operations
Manufactured on 0.23 µm MirrorBit process
technology
SecSi
— 128-word/256-byte sector for permanent, secure
— May be programmed and locked at the factory or by
Flexible sector architecture
— Sixty-three 32 Kword/64-Kbyte sectors
— Eight 4 Kword/8 Kbyte boot sectors
Compatibility with JEDEC standards
— Provides pinout and software compatibility for
Minimum 100,000 erase cycle guarantee per sector
20-year data retention at 125 C
High performance
— 90 ns access time
— 25 ns page read times
— 0.5 s typical sector erase time
— 15 µs typical effective write buffer word programming
— 4-word/8-byte page read buffer
— 16-word/32-byte write buffer
identification through an 8-word/16-byte random
Electronic Serial Number, accessible through a
command sequence
the customer
single-power supply flash, and superior inadvertent
write protection
time: 16-word/32-byte write buffer reduces overall
programming time for multiple-word/byte updates
DATASHEET
(Secured Silicon) Sector region
Refer to AMD’s Website (www.amd.com) for the latest information.
SOFTWARE & HARDWARE FEATURES
Low power consumption (typical values at 3.0 V, 5
MHz)
— 13 mA typical active read current
— 50 mA typical erase/program current
— 1 µA typical standby mode current
Package options
— 48-pin TSOP
— 48-ball Fine-pitch BGA
— 64-ball Fortified BGA
Software features
— Program Suspend & Resume: read other sectors
— Erase Suspend & Resume: read/program other
— Data# polling & toggle bits provide status
— Unlock Bypass Program command reduces overall
— CFI (Common Flash Interface) compliant: allows host
Hardware features
— Sector Group Protection: hardware-level method of
— Temporary Sector Unprotect: V
— WP#/ACC input:
— Hardware reset input (RESET#) resets device
— Ready/Busy# output (RY/BY#) indicates program or
before programming operation is completed
sectors before an erase operation is completed
multiple-word programming time
system to identify and accommodate multiple flash
devices
preventing write operations within a sector group
changing code in locked sectors
Write Protect input (WP#) protects top or bottom two
sectors regardless of sector protection settings
ACC (high voltage) accelerates programming time for
higher throughput during system production
erase cycle completion
Publication# 26518
Issue Date: May 16, 2003
ID
-level method of
Rev: B Amendment/0

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AM29LV320MT Summary of contents

Page 1

... DATASHEET Am29LV320MT/B 32 Megabit ( 16-Bit 8-Bit) MirrorBit 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS ARCHITECTURAL ADVANTAGES Single power supply operation — for read, erase, and program operations Manufactured on 0.23 µm MirrorBit process technology SecSi (Secured Silicon) Sector region — 128-word/256-byte sector for permanent, secure ...

Page 2

... Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effec- tiveness. The device electrically erases all bits within a sector simultaneously via hot-hole assisted erase. The data is programmed using hot electron injection. Am29LV320MT/B (Secured Silicon) Sector provides a May 16, 2003 ...

Page 3

... TSOP (std. & rev. pinout), Yes 64-ball Fortified BGA Implementing a Common Layout for AMD MirrorBit Prod- and Intel StrataFlash Memory Devices Tech- Migrating from Single-byte to Three-byte Device IDs AMD MirrorBit™ White Paper Am29LV320MT/B RY/BY# WP#, ACC WP# Protection Yes ACC only No WP Kbyte Yes ...

Page 4

... Writing Commands/Command Sequences ............................ 11 Automatic Sleep Mode ........................................................... 12 RESET#: Hardware Reset Pin ............................................... 12 Output Disable Mode .............................................................. 12 Table 2. Am29LV320MT Top Boot Sector Architecture ..................12 Table 3. Am29LV320MB Bottom Boot Sector Architecture .............14 Table 4. Autoselect Codes, (High Voltage Method) .......................16 Sector Group Protection and Unprotection ............................. 17 Table 5. Am29LV320MT Top Boot Sector Protection .....................17 Table 6 ...

Page 5

... Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic STB Timer Am29LV320MT/B 120R 110 120 110 120 110 120 – DQ0 DQ15 (A-1) Input/Output Buffers Data STB Latch ...

Page 6

... NC A19 DQ5 DQ12 WP#/ACC A18 A20 DQ2 DQ10 A17 A6 A5 DQ0 DQ8 CE# Am29LV320MT/B 48 A16 47 BYTE DQ15/A-1 44 DQ7 43 DQ14 42 DQ6 41 DQ13 40 DQ5 39 DQ12 38 DQ4 DQ11 36 35 DQ3 34 DQ10 33 DQ2 ...

Page 7

... A6 A5 DQ0 DQ8 CE and/or data integrity may be compromised if the package body is exposed to temperatures above 150 C for prolonged periods of time. Am29LV320MT DQ6 DQ13 DQ4 DQ11 DQ3 G3 H3 ...

Page 8

... CC (see Product Selector Guide for speed options and voltage supply tolerances Device Ground Pin Not Connected Internally LOGIC SYMBOL 21 A20–A0 CE# OE# WE# WP#/ACC RESET# BYTE# Am29LV320MT DQ15–DQ0 (A-1) RY/BY# May 16, 2003 ...

Page 9

... V CC (ns) Range Order Number 90 3.0–3.6 V Am29LV320MT90R 100 Am29LV320MB90R 110 2.7–3.6 V 120 Am29LV320MT100 100 Am29LV320MB100 110 3.0–3.6 V Am29LV320MT110 120 Am29LV320MB110 Am29LV320MT120 Am29LV320MB120 Am29LV320MT100R Am29LV320MB100R Am29LV320MT110R Am29LV320MB110R Am29LV320MT120R Am29LV320MB120R Am29LV320MT/B F BGA Valid Combinations for Speed BGA Packages (ns) Package Marking WCI L320MT90QI PCI L320MT90NI ...

Page 10

... To read array data from the outputs, the system must drive the CE# and OE# pins to V control and selects the device. OE# is the output con- trol and gates array data to the output pins. WE# should remain at V Am29LV320MT/B lists the device bus operations, the in- DQ8–DQ15 DQ0– BYTE# ...

Page 11

... The device re- and 2 indicates the quires standard access time (t when the device is in either of these standby modes, before it is ready to read data. AC Char- Am29LV320MT/B section contains timing specification tables on this pin, the device auto- HH for operations other than accelerated pro Autoselect Mode ...

Page 12

... When the RE- SET# pin is driven low for at least a period of t device immediately terminates any operation in progress, tristates all output pins, and ignores all Table 2. Am29LV320MT Top Boot Sector Architecture Sector Address Sector A20–A12 SA0 ...

Page 13

... Table 2. Am29LV320MT Top Boot Sector Architecture (Continued) Sector Address Sector A20–A12 SA28 011000xxx SA29 011101xxx SA30 011110xxx SA31 011111xxx SA32 100000xxx SA33 100001xxx SA34 100010xxx SA35 101011xxx SA36 100100xxx SA37 100101xxx SA38 100110xxx SA39 100111xxx SA40 101000xxx SA41 101001xxx SA42 ...

Page 14

... Am29LV320MT/B (x16) Address Range 00000h–00FFFh 01000h–01FFFh 02000h–02FFFh 03000h–03FFFh 04000h–04FFFh 05000h–05FFFh 06000h–06FFFh 07000h–07FFFh 08000h–0FFFFh 10000h–17FFFh 18000h–1FFFFh 20000h–27FFFh 28000h– ...

Page 15

... A20:A0 in word mode (BYTE Am29LV320MT/B (x16) Address Range 178000h–17FFFFh 180000h–187FFFh 188000h–18FFFFh 190000h–197FFFh 198000h–19FFFFh 1A0000h–1A7FFFh 1A8000h–1AFFFFh 1B0000h–1B7FFFh 1B8000h–1BFFFFh 1C0000h–1C7FFFh 1C8000h– ...

Page 16

... Sector Address Don’t care. IH Am29LV320MT/B 2 and 3). Table 4 shows the 12 and 13. This . Refer to the Autoselect ID section for more information. DQ8 to DQ15 A0 DQ7 to DQ0 BYTE# BYTE 01h ...

Page 17

... AMD’s ExpressFlash™ Service. Contact an AMD representative for details possible to determine whether a sector group is protected or unprotected. See the section for details. Table 5. Am29LV320MT Top Boot Sector Protection Sector A20–A12 SA0-SA3 0000XXXXXh ...

Page 18

... Notes: 1. All protected sector groups unprotected (If WP the first or last sector will remain protected). 2. All previously protected sector groups are protected once again. Figure 1. Temporary Sector Group Unprotect Operation Am29LV320MT/B START RESET (Note 1) Perform Erase or Program Operations RESET ...

Page 19

... Reset PLSCNT = 1 Increment PLSCNT No Yes PLSCNT = 1000? Yes Device failed Sector Group Unprotect Algorithm Am29LV320MT/B START PLSCNT = 1 RESET Wait 1 s Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes All sector No groups ...

Page 20

... Customers may opt to have their code programmed by AMD through the AMD ExpressFlash service (Express Flash Factory Locked). The devices are then shipped from AMD’s factory with the SecSi Sector permanently locked. Contact an AMD representative for details on using AMD’s ExpressFlash service. Am29LV320MT/B Command Definitions This IH ...

Page 21

... For further information, please refer to the CFI Specifi- cation and CFI Publication 100, available via the World Wide Web at http://www.amd.com/flash/cfi. Al- ternatively, contact an AMD representative for copies of these documents. Am29LV320MT/B , the device does not ac- LKO is greater than V CC LKO ...

Page 22

... Typical timeout per individual block erase 2 Typical timeout for full chip erase 2 Max. timeout for byte/word write 2 Max. timeout for buffer write 2 Max. timeout per individual block erase 2 Max. timeout for full chip erase 2 Am29LV320MT/B Description Description pin present) pin present µ ...

Page 23

... Number of Erase Block Regions within device (01h = uniform device, 02h = boot device) Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) Erase Block Region 2 Information (refer to CFI publication 100) Erase Block Region 3 Information (refer to CFI publication 100) Erase Block Region 4 Information (refer to CFI publication 100) Am29LV320MT/B Description N 23 ...

Page 24

... No commands are required to retrieve data. The device is ready to read array data after completing an Embedded Program or Embedded Erase algorithm. After the device accepts an Erase Suspend command, the device enters the erase-suspend-read mode, after Am29LV320MT/B AC Characteristics section for timing May 16, 2003 ...

Page 25

... SecSi Sector is en- abled. Word/Byte Program Command Sequence Programming is a four-bus-cycle operation. The pro- gram command sequence is initiated by writing two unlock write cycles, followed by the program set-up command. The program address and data are written Am29LV320MT/B A7:A0 A6:A-1 (x16) (x8) 00h 00h ...

Page 26

... Write Buffer Programming operation. The device then begins programming. Data polling should be used while monitoring the last address location loaded into the write buffer. DQ7, DQ6, DQ5, and DQ1 should be monitored to determine the device status during Write Buffer Programming. Am29LV320MT/B –A . All subsequent ad- MAX ...

Page 27

... In addition, no external pullup is nec- essary since the WP#/ACC pin has internal pullup Figure 5 illustrates the algorithm for the program oper- ation. Refer to the table in the AC Characteristics section for parameters, and Figure 17 for timing diagrams. Am29LV320MT/B for operations HH Erase and Program Operations 27 ...

Page 28

... Yes No Yes Yes No PASS Am29LV320MT/B Notes: 1. When Sector Address is specified, any address in the selected sector is acceptable. However, when loading Write-Buffer address locations with data, all addresses must fall within the selected Write-Buffer Page. 2. DQ7 may change simultaneously with DQ5. ...

Page 29

... Program Suspend mode and continue the programming opera- tion. Further writes of the Resume command are ig- nored. Another Program Suspend command can be written after the device has resume programming. Am29LV320MT/B Write Operation Status for more 29 ...

Page 30

... The system must rewrite the command se- quence and any additional addresses and commands. The system can monitor DQ3 to determine if the sec- tor erase timer has timed out (See the section on DQ3: Sector Erase Timer.). The time-out begins from the ris- Am29LV320MT/B section for infor- ta- 12 and ...

Page 31

... Further writes of the Resume com- mand are ignored. Another Erase Suspend command can be written after the chip has resumed erasing. Am29LV320MT/B Write Operation Status section for infor- Write Operation Status section for more ...

Page 32

... Erase Suspend mode. The Erase Suspend command is valid only during a sector erase operation. 16. The Erase Resume command is valid only during the Erase Suspend mode. 17. Command is valid when device is ready to read array data or when device is in autoselect mode. Am29LV320MT Fourth Fifth Sixth Addr ...

Page 33

... Erase Suspend mode. The Erase Suspend command is valid only during a sector erase operation. 16. The Erase Resume command is valid only during the Erase Suspend mode. 17. Command is valid when device is ready to read array data or when device is in autoselect mode. Am29LV320MT Fourth Fifth Sixth Addr ...

Page 34

... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 8. Data# Polling Algorithm Am29LV320MT/B section shows the Data# Yes No Yes Yes ...

Page 35

... Toggle Bit I on DQ6. Figure 9 shows the toggle bit algorithm. Figure 21 in the “AC Characteristics” section shows the toggle bit timing diagrams. Figure 22 shows the differences be- tween DQ2 and DQ6 in graphical form. See also the subsection on DQ2: Toggle Bit Am29LV320MT/B II. 35 ...

Page 36

... DQ5 has not gone high. The system may continue to monitor the toggle bit and DQ5 through successive read cy- cles, determining the status as described in the previ- ous paragraph. Alternatively, it may choose to perform Am29LV320MT/B Table 14 to compare out- RY/BY#: Ready/Busy# sub- ...

Page 37

... DQ6 (Note 1) DQ7# Toggle 0 0 Toggle 0 Invalid (not allowed toggle 0 DQ7# Toggle 0 DQ7# Toggle 0 DQ7# Toggle 0 Am29LV320MT/B Sector Erase Command Write Buffer DQ2 DQ3 (Note 2) DQ1 RY/BY# N/A No toggle 0 1 Toggle N/A Data N/A Toggle N/A Data ...

Page 38

... Note: Operating ranges define those limits between which the functionality of the device is guaranteed +0.8 V –0.5 V –2.0 V Figure 10 +0 –2.0 V for SS Figure 11. Am29LV320MT Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform May 16, 2003 ...

Page 39

... 2.7 –3 4.0 mA min I = –2.0 mA min I = –100 µ min is ± 5.0 µ max Am29LV320MT/B Min Typ Max Unit 1.0 µA 35 µA 35 µA 1.0 µ µ ...

Page 40

... Output timing measurement reference levels INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Figure 13. Input Waveforms and Measurement Levels Am29LV320MT/B All Speeds Unit 1 TTL gate 0.0–3 ...

Page 41

... Max 25 Max Max Min Min Min t RC Addresses Stable t ACC OEH t CE HIGH Z Figure 14. Read Operation Timings Am29LV320MT/B Speed Options 100 110R 110 120R 120 100 110 120 100 110 120 100 110 120 ...

Page 42

... AC CHARACTERISTICS A21-A2 A1-A0 Data Bus CE# OE# * Figure shows word mode. Addresses are A1–A-1 for byte mode Same Page PACC PACC t ACC Qa Qb Figure 15. Page Read Timings Am29LV320MT PACC Qc Qd May 16, 2003 ...

Page 43

... Description Max Max Min Min Min Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 16. Reset Timings Am29LV320MT/B All Speed Options Unit 20 s 500 ns 500 ...

Page 44

... Min Typ Per Byte Typ Per Word Typ Per Byte Typ Per Word Typ Byte Typ Word Byte Typ Word Typ Min Min Min 90 Am29LV320MT/B Speed Options 100, 110, 120, 100R 110R 120R Unit 100 110 120 ...

Page 45

... WPH A0h t BUSY is the true data at the program address. OUT Figure 17. Program Operation Timings Am29LV320MT/B Read Status Data (last two cycles WHWH1 Status D OUT VHH 45 ...

Page 46

... These waveforms are for the word mode. Figure 19. Chip/Sector Erase Operation Timings 555h for chip erase WPH t DH 55h 30h 10 for Chip Erase t BUSY Am29LV320MT/B Read Status Data WHWH2 In Complete Progress t RB May 16, 2003 ...

Page 47

... Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle. Figure 20. Data# Polling Timings (During Embedded Algorithms) May 16, 2003 Complement Complement Status Data Status Data Am29LV320MT/B VA High Z Valid Data True High Z True Valid Data 47 ...

Page 48

... AHT t ASO t CEPH t OEPH t OE Valid Valid Status Status (first read) (second read) Enter Erase Suspend Program Erase Suspend Read Program Figure 22. DQ2 vs. DQ6 Am29LV320MT/B Valid Status (stops toggling) Erase Resume Erase Erase Suspend Read May 16, 2003 Valid Data Erase Complete ...

Page 49

... VIDR CE# WE# RY/BY# Figure 23. Temporary Sector Group Unprotect Timing Diagram May 16, 2003 Min Min Program or Erase Command Sequence t RSP Am29LV320MT/B All Speed Options Unit 500 ns 4 µ VIDR t RRB ...

Page 50

... For sector group protect, A6–A0 = 0xx0010. For sector group unprotect, A6–A0 = 1xx0010. Figure 24. Sector Group Protect and Unprotect Timing Diagram Valid* Valid* 60h Sector Group Protect: 150 µs, Sector Group Unprotect Am29LV320MT/B Valid* Verify 40h Status May 16, 2003 ...

Page 51

... Min Min Min Typ Per Byte Typ Per Word Typ Per Byte Typ Per Word Typ Byte Typ Word Byte Typ Word Typ Min Am29LV320MT/B Speed Options 100, 110, 120, 90R 100R 110R 120R Unit 90 100 110 120 ...

Page 52

... Data# Polling GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase is the data written to the device. OUT Operation Timings Am29LV320MT/B PA DQ7# D OUT May 16, 2003 ...

Page 53

... Per Byte 7.5 Per Word 15 200 Per Byte 6.25 Per Word 12.5 31.5 = 3.0, worst case temperature. Maximum values are valid up to and including 100,000 CC = 3.0 V, one pin at a time. CC Am29LV320MT/B Unit Comments 3.5 sec Excludes 00h programming prior to erasure (Note 6) 64 sec 600 µs 600 µs 540 µ ...

Page 54

... Parameter Description Minimum Pattern Data Retention Time Test Setup TSOP Fine-Pitch BGA TSOP OUT Fine-Pitch BGA TSOP Fine-Pitch BGA Test Conditions 150 C 125 C Am29LV320MT/B Typ Max Unit 6 7.5 pF 4.2 5 5.4 6 3.9 4.7 pF Min Unit ...

Page 55

... PHYSICAL DIMENSIONS TS 048—48-Pin Standard Pinout Thin Small Outline Package (TSOP) May 16, 2003 Am29LV320MT/B Dwg rev AA; 10/99 55 ...

Page 56

... PHYSICAL DIMENSIONS TS 048—48-Pin Standard Pinout Thin Small Outline Package (TSOP Am29LV320MT/B Dwg rev AA; 10/99 May 16, 2003 ...

Page 57

... PHYSICAL DIMENSIONS FBC048—48-Ball Fine-pitch Ball Grid Array (fBGA Package May 16, 2003 Am29LV320MT/B Dwg rev AF; 10/99 57 ...

Page 58

... PHYSICAL DIMENSIONS LAA064—64-Ball Fortified Ball Grid Array ( BGA Package Am29LV320MT/B May 16, 2003 ...

Page 59

... Noted that the SecSi Sector, autoselect, and CFI functions are unavailable when a program or erase operation is in progress.” Common Flash Memory Interface (CFI) Changed wording in last sentence of third paragraph from, “...the autoselect mode.” to “...reading array data.” Changed CFI website address. Am29LV320MT ...

Page 60

... Erase and Program Operations and Alternate CE# Controlled Erase and Program Operations Changed Accelerated Effective Write Buffer Program 2 parameters in Operation value. Erase and Programming Performance Input values into table that were previously TBD. 2 parameters in Modified notes. Removed Word references. Am29LV320MT and 3 May 16, 2003 ...

Page 61

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