AM29LV320MT AMD [Advanced Micro Devices], AM29LV320MT Datasheet - Page 4

• Manufacturer Part Number: AM29LV320MT
• Description: 32 Megabit (2 M x 16-Bit/4 M x 8-Bit) MirrorBit 3.0 Volt-only Boot Sector Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Common Flash Memory Interface (CFI) . . . . . . . 21
Command Definitions . . . . . . . . . . . . . . . . . . . . . 24
Write Operation Status . . . . . . . . . . . . . . . . . . . . 34
4
Requirements for Reading Array Data ................................... 10
Writing Commands/Command Sequences ............................ 11
Automatic Sleep Mode ........................................................... 12
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 12
Sector Group Protection and Unprotection ............................. 17
Write Protect (WP#) ................................................................ 17
Temporary Sector Group Unprotect ....................................... 18
SecSi (Secured Silicon) Sector Flash Memory Region .......... 20
Hardware Data Protection ...................................................... 21
Reading Array Data ................................................................ 24
Reset Command ..................................................................... 25
Autoselect Command Sequence ............................................ 25
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 25
Word/Byte Program Command Sequence ............................. 25
Program Suspend/Program Resume Command Sequence ... 29
Chip Erase Command Sequence ........................................... 30
Sector Erase Command Sequence ........................................ 30
Erase Suspend/Erase Resume Commands ........................... 31
DQ7: Data# Polling ................................................................. 34
DQ6: Toggle Bit I .................................................................... 35
DQ2: Toggle Bit II ................................................................... 36
Reading Toggle Bits DQ6/DQ2 .............................................. 36
DQ5: Exceeded Timing Limits ................................................ 37
Table 1. Device Bus Operations .....................................................10
Table 2. Am29LV320MT Top Boot Sector Architecture ..................12
Table 3. Am29LV320MB Bottom Boot Sector Architecture .............14
Table 4. Autoselect Codes, (High Voltage Method) .......................16
Table 5. Am29LV320MT Top Boot Sector Protection .....................17
Table 6. Am29LV320MB Bottom Boot Sector Protection ................17
Figure 1. Temporary Sector Group Unprotect Operation................ 18
Figure 2. In-System Sector Group Protect/Unprotect Algorithms ... 19
Table 7. SecSi Sector Contents ......................................................20
Figure 3. SecSi Sector Protect Verify.............................................. 21
Figure 4. Write Buffer Programming Operation............................... 28
Figure 5. Program Operation .......................................................... 29
Figure 6. Program Suspend/Program Resume............................... 30
Figure 7. Erase Operation............................................................... 31
Figure 8. Data# Polling Algorithm ................................................... 34
Figure 9. Toggle Bit Algorithm......................................................... 36
D A T A S H E E T
Am29LV320MT/B
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 38
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Key to Switching Waveforms. . . . . . . . . . . . . . . . 40
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 41
Erase And Programming Performance. . . . . . . . 53
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 53
TSOP Pin and BGA Package Capacitance . . . . . 54
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 55
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 56
Physical Dimensions
LAA064—64-Ball Fortified Ball Grid Array (FBGA)
13 x 11 mm Package . . . . . . . . . . . . . . . . . . . . . . . 58
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 60
DQ3: Sector Erase Timer ....................................................... 37
DQ1: Write-to-Buffer Abort ..................................................... 37
Read-Only Operations ........................................................... 41
Hardware Reset (RESET#) .................................................... 43
Erase and Program Operations .............................................. 44
Temporary Sector Unprotect .................................................. 49
Alternate CE# Controlled Erase and Program Operations ..... 51
TS 048—48-Pin Standard Pinout Thin Small Outline Package
(TSOP) ................................................................................... 55
TS 048—48-Pin Standard Pinout Thin Small Outline Package
(TSOP) ................................................................................... 56
FBC048—48-Ball Fine-pitch Ball Grid Array (fBGA)
9 x 8 mm Package .................................................................. 57
Table 14. Write Operation Status ................................................... 37
Figure 10. Maximum Negative Overshoot Waveform ................... 38
Figure 11. Maximum Positive Overshoot Waveform..................... 38
Figure 12. Test Setup.................................................................... 40
Table 15. Test Specifications ......................................................... 40
Figure 13. Input Waveforms and
Measurement Levels...................................................................... 40
Figure 14. Read Operation Timings ............................................... 41
Figure 15. Page Read Timings ...................................................... 42
Figure 16. Reset Timings ............................................................... 43
Figure 17. Program Operation Timings.......................................... 45
Figure 18. Accelerated Program Timing Diagram.......................... 45
Figure 19. Chip/Sector Erase Operation Timings .......................... 46
Figure 20. Data# Polling Timings (During Embedded Algorithms). 47
Figure 21. Toggle Bit Timings (During Embedded Algorithms)...... 48
Figure 22. DQ2 vs. DQ6................................................................. 48
Figure 23. Temporary Sector Group Unprotect Timing Diagram ... 49
Figure 24. Sector Group Protect and Unprotect Timing Diagram .. 50
Figure 25. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.......................................................................... 52
May 16, 2003