74HCT573DB,118 NXP Semiconductors, 74HCT573DB,118 Datasheet - Page 6
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74HCT573DB,118
Manufacturer Part Number
74HCT573DB,118
Description
IC OCTAL D TRANSP LATCH 20SSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
D-Typer
Datasheet
1.74HC573BQ115.pdf
(26 pages)
Specifications of 74HCT573DB,118
Logic Type
D-Type Transparent Latch
Package / Case
20-SSOP
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
17ns
Current - Output High, Low
6mA, 6mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
8
Logic Family
HCT
Polarity
Non-Inverting
High Level Output Current
- 6 mA
Low Level Output Current
6 mA
Propagation Delay Time
17 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Bits
8
Number Of Elements
1
Latch Mode
Transparent
Technology
CMOS
Package Type
SSOP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HCT573DB-T
74HCT573DB-T
935186980118
74HCT573DB-T
935186980118
Philips Semiconductors
7. Functional description
8. Limiting values
74HC_HCT573_3
Product data sheet
Table 3:
Table 4:
[1]
Table 5:
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
Q4
Q3
Q2
Q1
Q0
V
Operating mode
Enable and read register
(transparent mode)
Latch and read register
Latch register and disable outputs
Symbol Parameter
V
I
I
I
I
I
T
IK
OK
O
CC
GND
stg
CC
CC
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
Z = high-impedance OFF-state.
supply voltage
input clamping current
output clamping current
output current
quiescent supply current
ground current
storage temperature
Pin description
Function table
Limiting values
Pin
15
16
17
18
19
20
Rev. 03 — 17 January 2006
[1]
…continued
Description
3-state latch output 4
3-state latch output 3
3-state latch output 2
3-state latch output 1
3-state latch output 0
supply voltage
Control
OE
L
L
H
Conditions
V
V
V
I
O
O
< 0.5 V or V
< 0.5 V or V
= 0.5 V to (V
LE
H
L
L
74HC573; 74HCT573
Octal D-type transparent latch; 3-state
I
O
> V
CC
> V
CC
+ 0.5 V)
CC
+ 0.5 V
Input
Dn
L
H
l
h
l
h
+ 0.5 V
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Internal
latches
L
H
L
H
L
H
Min
-
-
-
-
-
0.5
65
Max
+7
70
+150
20
20
35
70
Output
Qn
L
H
L
H
Z
Z
Unit
V
mA
mA
mA
mA
mA
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