AM29PL160C AMD [Advanced Micro Devices], AM29PL160C Datasheet - Page 43

• Manufacturer Part Number: AM29PL160C
• Description: 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only High Performance Page Mode Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

REVISION SUMMARY
Revision A (August 1998)
Initial release.
Revision A+1 (September 1998)
Sector Protection/Unprotection
Added reference to Temporary Unprotect Enable/Dis-
able command sequence.
Common Flash Memory Interface (CFI)
Deleted reference to upper address bits in word mode.
Revision B (January 1999)
Ordering Information
Deleted commercial temperature rating.
DC Characteristics
Corrected I
Revision B+1 (February 1999)
DC Characteristics
Replaced TBDs for I
Revision B+2 (March 5, 1999)
Distinctive Characteristics
In the first subbullet under the Flexible Sector Architec-
ture bullet, deleted the reference to “one 8 Kbyte”
sector.
Revision B+3 (May 14, 1999)
Global
Deleted the 60R speed option and added the 65R
speed option.
Common Flash Memory Interface (CFI)
Corrected the data for the following CFI hex addreses:
38, 39, 3C, 4C.
Absolute Maximum Ratings
Corrected the maximum rating for all other pins to +5.5
V.
Revision B+4 (June 25, 1999)
Changed data sheet status to preliminary. Deleted the
70 ns, full voltage range speed option.
Revision B+5 (July 26, 1999)
Global
Added the reverse pinout SO package. Deleted the
TSOP package.
Physical Dimensions
Restored section.
May 9, 2006 22143C7
CC1
test condition for OE# to V
CC4
with specifications.
IH
.
D A T A
Am29PL160C
S H E E T
Revision B+6 (September 2, 1999)
Connection Diagrams
Corrected the pinouts of pins 1, 2, 43, and 44 on the
reverse SO diagram.
Revision B+7 (February 4, 2000)
Global
Added 48-pin TSOP.
Revision C (February 21, 2000)
Global
The “preliminary” designation has been removed from
the document. Parameters are now stable, and only
speed, package, and temperature range combinations
are expected to change in future data sheet revisions.
Added dash to ordering part numbers.
Revision C+1 (June 20, 2000)
Global
Deleted the SOR44 package. Deleted references to
top boot configuration.
Product Selector Guide, Ordering Information
Added -90R speed option.
Revision C+2 (June 28, 2000)
Command Definitions
Command Definitions table: Corrected address in the
sixth cycle of the chip erase command sequence from
2AA to AAA.
Revision C+3 (November 14, 2000)
Added table of contents.
Revision C+4 (June 12, 2002)
Global
Deleted references to hardware reset (RESET#) input.
Added reverse pinout SO package. Deleted 90R
speed option.
TSOP and SO Pin Capacitance
Added TSOP pin capacitance.
Revision C+5 (June 10, 2004)
Ordering Information
Added Pb-free package OPNs
Revision C+6 (February 16, 2006)
Global
Deleted 120 ns speed option.
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