AK4103A_09 AKM [Asahi Kasei Microsystems], AK4103A_09 Datasheet - Page 21

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AK4103A_09

Manufacturer Part Number
AK4103A_09
Description
192kHz 24-Bit DIT
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
Notes:
MS0251-E-01
0AH-
0EH-
Addr
06H-
0DH
00H
01H
02H
03H
04H
05H
09H
11H
Register Map
(1) In stereo mode, A indicates Left Channel and B indicates Right Channel.
(2) In asynchronous mode, the DIF2-0 and CKS1-0 bits are logically “ORed” with the DIF2-0 and CKS1-0 pins.
(3) For addresses from 12H to FFH, data is not written.
(4) The PDN pin = “L” resets the registers to their default values.
Clock/Format Control
Validity/fs Control
A-channel U-bit buffer
A-channel C-bit buffer
A-channel C-bit buffer
A-channel C-bit buffer
A-channel C-bit buffer
B-channel C-bit buffer
B-channel U-bit buffer
Register Name
for Byte 0-3
for Byte 0-3
for Byte 0-3
for Byte 0
for Byte 1
for Byte 2
for Byte 3
CRCE
CA15
CA23
CA31
UA31
UB31
CB31
UA7
CA7
CB7
UB7
D7
0
CA14
CA22
CA30
DIF2
CA6
D6
0
Table 7. Register Map
- 21 -
CA13
CA21
CA29
DIF1
CA5
D5
0
CA12
CA20
CA28
DIF0
CA4
D4
V1
CKS1
CA11
CA19
CA27
CA3
FS3
D3
CKS0
CA10
CA18
CA26
CA2
FS2
D2
MUTEN
CA17
CA25
CA1
CA9
FS1
D1
[AK4103A]
2009/01
RSTN
UA24
CA16
CA24
CB24
UB24
CA0
CA8
UA0
UB0
CB0
FS0
D0

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