AK4103A_09 AKM [Asahi Kasei Microsystems], AK4103A_09 Datasheet - Page 6

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AK4103A_09

Manufacturer Part Number
AK4103A_09
Description
192kHz 24-Bit DIT
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
(Ta=25°C; VDD=4.75~5.25V; C
Note 5. BICK rising edge must not occur at the same time as LRCK edge.
Note 6. CDTO pin is internally connected to a pull-down resistor.
MS0251-E-01
Parameter
Master Clock Timing
LRCK Timing
Audio Interface Timing
Control Interface Timing
Power-down & Reset Timing
Slave Mode
BICK Period
BICK Pulse Width Low
LRCK Edge to BICK “↑”
BICK “↑” to LRCK Edge
SDTI Hold Time
SDTI Setup Time
Master Mode
BICK Frequency
BICK Duty
BICK “↓” to LRCK
SDTI Hold Time
SDTI Setup Time
Frequency
Duty Cycle
Frequency
Duty Cycle at Slave Mode
Duty Cycle at Master Mode
CCLK Period
CCLK Pulse Width Low
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
CDTO Delay
CSN “↑” to CDTO Hi-Z
PDN Pulse Width
Pulse Width High
Pulse Width High
L
=20pF)
SWITCHING CHARACTERISTICS
(Note
(Note
(Note
5)
5)
6)
- 6 -
Symbol
tBCKH
tMBLR
tCCKH
tBCKL
tCCKL
dCLK
dLCK
dBCK
tPDW
fBCK
tCDH
tCSW
tDCD
fCLK
tBCK
tSDH
tSDH
tCCK
tLRB
tBLR
tCDS
tCSH
tCCZ
tSDS
tSDS
tCSS
fs
3.584
min
200
520
150
-20
40
28
45
36
15
15
15
15
20
20
80
80
50
50
50
50
8
8
64fs
typ
50
50
27.648
max
192
60
55
20
45
70
[AK4103A]
2009/01
Units
MHz
kHz
Hz
%
%
%
ns
ns
ns
ns
ns
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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