AK4121A AKM [Asahi Kasei Microsystems], AK4121A Datasheet - Page 13

• Manufacturer Part Number: AK4121A
• Description: Asynchronous Sample Rate Converter
• Manufacturer: AKM [Asahi Kasei Microsystems]

■
The AK4121A is reset automatically when the output clock is stopped. If the output clock is started again, normal data
is output within 100ms.
■
The recommended sequence for changing clocks is shown in Figure 10.
Note:
MS0337-E-02
Internal Reset Function for Clock Change
Sequence of changing clocks
(1) The data on SDTO may cause a clicking noise. To prevent this, set SDTI to “0” from GD before the PDN pin
(2) SMUTE can also be used to remove the unknown data.
changes to “L”, which will cause the data on SDTO to remain “0”.
External clocks
(input port
PDN
SDTO
SMUTE
Att.Level
(interlal state)
(recommended)
or output port)
(2)
-
0dB
∞
dB
normal data
normal operation
state 1
1024/fso
Figure 10. Sequence of changing clocks
(unknown)
< 10msec
Power
down
(1)
PLL locktime
& fs detection
state 2
- 13 -
< 100msec
1024/fso
normal operation
normal data
2007/07