MT9172AE ZARLINK [Zarlink Semiconductor Inc], MT9172AE Datasheet - Page 7

• Manufacturer Part Number: MT9172AE
• Description: ISO2-CMOS ST-BUS FAMILY
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Advance Information
In DIGITAL NETWORK (DN) mode, upon entering
the DNIC from the DV and CD ports, the B-channel
data, D-channel D0 (and D1 for 160 kbit/s), the HK
bit of the C-channel (160kbit/s only) and a SYNC bit
are combined in a serial format to be sent out on the
line by the Transmit Interface (Figures 11, 12). The
SYNC bit produces an alternating 1-0 pattern each
frame in order for the remote end to extract the frame
alignment from the line. It is possible for the remote
end to lock on to a data bit pattern which simulates
this alternating 1-0 pattern that is not
SYNC. To decrease the probability of this happening
the DNIC may be programmed to put the data
through a prescrambler that scrambles the data
according to a predetermined polynomial with
respect to the SYNC bit. This greatly decreases the
probability that the SYNC pattern can be reproduced
by any data on the line.
canceller to function correctly, a dedicated scrambler
is used with a scrambling algorithm which is different
for the SLV and MAS modes. These algorithms are
calculated in such a way as to provide orthogonality
CLD
TCK
CDi
CDo
F0
C4
CDSTo
CDSTi
F0o
C
C
6
6
C
C
0
0
C
C
1
1
C
C
7
7
C
C
Channel Time 0
2
2
3.9 sec
C
C
3
3
C
C
C
C
4
4
0
0
In order for the echo
C
C
5
5
62.5 sec
C
C
6
6
C
C
1
1
C
C
7
7
Figure 7 - CD Port (Modes 2,6)
Figure 8 - CD Port (Modes 1,5)
the true
C
C
2
2
125 sec
C
C
3
3
between the near and far end data streams such that
the correlation between the two signals is very low.
For any two DNICs on a link, one must be in SLV
mode with the other in MAS mode. The scrambled
data is differentially encoded which serves to make
the data on the line polarity-independent. It is then
biphase encoded as shown in Figure 10. See “Line
Interface” section for more details on the encoding.
Before leaving the DNIC the differentially encoded
biphase data is passed through a pulse-shaping
bandpass transmit filter that filters out the high and
low frequency components and conditions the signal
for transmission on the line.
The composite transmit and receive signal is
received at L
passes through a Precanceller which is a summing
amplifier and lowpass filter that partially cancels the
near-end signal and provides first order antialiasing
for the received signal. Internal, partial cancellation
D
D
0
0
D
D
C
C
4
4
1
1
D
D
Channel Time 16
2
2
D
D
3
3
C
C
IN
5
5
D
D
.
4
4
On entering the DNIC this signal
D
D
5
5
C
C
D
D
6
6
6
6
D
D
7
7
C
C
7
7
MT9171/72
C
C
0
0
C
C
9-121
C
C
1
1
0
0