ZL30105QDG ZARLINK [Zarlink Semiconductor Inc], ZL30105QDG Datasheet - Page 22

• Manufacturer Part Number: ZL30105QDG
• Description: T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

3.5.2
In the automatic mode of operation (MODE_SEL1:0 = 11), the ZL30105 automatically selects a reference input that
is not out-of-range (REF_OOR=0, see Figure 3). The state machine can only select REF0 or REF1; REF2 cannot
be selected in the Automatic mode (see Figure 14).
If the current reference (REF0 or REF1) used for synchronization fails, the state machine will switch to the other
reference. If both references fail then the ZL30105 enters the Holdover mode without switching to another
reference. When the ZL30105 comes out of reset or when REF2 is the current reference when the ZL30105 is put
in the Automatic mode, then REF0 has priority over REF1. Otherwise there is no preference for REF0 or REF1
which is referred to as non-revertive reference selection.
In the automatic mode of operation, both pins REF_SEL1 and REF_SEL0 are configured as outputs. The logic level
on the REF_SEL0 output indicates the current input reference being selected for synchronization (see Table 6).
REF_OOR = reference out of range, see Figure 3.
This is an internal signal.
Automatic Reference Switching
Note: LOCK pin behaviour depends on phase and frequency offset of REF1.
REF_SEL
LOCK
Table 6 - The Reference Selection Pins in the Automatic Mode (MODE_SEL=11)
REF_SEL1
(output pin)
Figure 14 - Reference Selection in Automatic Mode (MODE_SEL=11)
0
0
Figure 13 - Reference Switching in Normal Mode
Reference
REF0
REF0
RST && REF_OOR0=0
REF_SEL0
(output pin)
Zarlink Semiconductor Inc.
REF_OOR0=0
0
1
REF1
REF_OOR0=0 &&
REF_OOR0=1 &&
ZL30105
REF_OOR1=1
REF_OOR1=0
Reference
REF2
22
Lock Time
REF_OOR0=1 && REF_OOR1=0
Input Reference
Reference
REF1
RST && REF_OOR0=1 && REF_OOR1=0
REF0
REF1
Data Sheet