ZL30414QGC ZARLINK [Zarlink Semiconductor Inc], ZL30414QGC Datasheet - Page 7
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ZL30414QGC
Manufacturer Part Number
ZL30414QGC
Description
SONET/SDH Clock Multiplier PLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL30414QGC.pdf
(24 pages)
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ZL30414
Data Sheet
2.0
ZL30414 Performance
The following are some of the ZL30414 performance indicators that complement results listed in the Characteristics
section of this data sheet.
2.1
Input Jitter Tolerance
Jitter tolerance is a measure of the PLL’s ability to operate properly (i.e., remain in lock and/or regain lock in the
presence of large jitter magnitudes at various jitter frequencies) when jitter is applied to its input reference. The
input jitter tolerance of the ZL30414 is shown in Figure 4. On this graph, the single line at the top represents
measured input jitter tolerance and the three overlapping lines below represent minimum input jitter tolerance for
OC-192, OC-48, and OC-12 network interfaces. The jitter tolerance is expressed in picoseconds (pk-pk) to
accommodate requirements for interfaces operating at different rates.
Figure 4 - Input Jitter Tolerance
7
Zarlink Semiconductor Inc.