AM79C930VC/W AMD [Advanced Micro Devices], AM79C930VC/W Datasheet - Page 85
![no-image](/images/no-image-200.jpg)
AM79C930VC/W
Manufacturer Part Number
AM79C930VC/W
Description
PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C930VCW.pdf
(161 pages)
- Current page: 85 of 161
- Download datasheet (678Kb)
MIR10: Reserved
This register is reserved.
Bit
7:0
MIR11: Reserved
This register is reserved.
Bit
7:0
MIR12: Reserved
This register is reserved.
Bit
7:0
MIR13: Reserved
This register is reserved.
Bit
7:0
MIR14: Reserved
This register is reserved.
7:0
MIR15: Reserved
This register is reserved.
Bit
7:0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
Name
Name
Name
Name
Reset Value
Reset Value
Reset Value
Reset Value
Reset Value
–
–
–
–
–
–
P R E L I M I N A R Y
PCMCIA CCSR is RESET to a 0. If the STSCHGFN bit of TCR15
has been set to a 0, then the value that is written to this bit will be
inverted and driven to the STSTCHG pin of the Am79C930 device.
The value that is read from this bit always represents the inverse of
the current value of the STSTCHG pin of the Am79C930 device.
THIS FUNCTION IS ONLY AVAILABLE IN PCMCIA MODE.
The complete control of the function of the STSCHG/BALE pin is
described in the Multi-Function Pin section.
Description
Reserved. Must be written as a 0. Reads of this bit produce
undefined data.
Description
Reserved. Must be written as a 0. Reads of this bit produce
undefined data.
Description
Reserved. Must be written as a 0. Reads of this bit produce
undefined data.
Description
Reserved. Must be written as a 0. Reads of this bit produce
undefined data.
Reserved. Must be written as a 0. Reads of this bit produce
undefined data.
Description
Reserved. Must be written as a 0. Reads of this bit produce
undefined data.
Am79C930
AMD
85
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