ZL50418GKC ZARLINK [Zarlink Semiconductor Inc], ZL50418GKC Datasheet - Page 62
ZL50418GKC
Manufacturer Part Number
ZL50418GKC
Description
Managed 16-Port 10/100 M + 2-Port 1 G Ethernet Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50418GKC.pdf
(163 pages)
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14.2.7
•
•
•
14.2.8
•
•
Indirectly Accessed Registers
14.3
14.3.1
I
Accessed by CPU, serial interface and I
2
C Address 000 - 01A; CPU Address:0000+2xN (N = port number)
Address = 6 (read/write)
When CPU writes to this register, data is written to the Control Command Frame Receive Buffer
When CPU reads this register, data is read from the Control Command Frame Transmit Buffer1
Address = 7 (read only)
When CPU reads this register, data is read from the Control Command Frame Transmit Buffer1
Bit [0]
Bit [1]
Bit [2]
(Group 0 Address) MAC Ports Group
Control Command Frame Buffer1 Access Register
Control Command Frame Buffer2 Access Register
ECR1Pn: Port N Control Register
7
Sp State
•
•
•
•
•
•
•
•
6
1 - Flow Control Off
0 - Flow Control On
When Flow Control On:
In half duplex mode the MAC transmitter applies back pressure for flow control.
In full duplex mode the MAC transmitter sends Flow Control frames when
necessary. The MAC receiver interprets and processes incoming flow control
frames. The Flow Control Frame Received counter is incremented whenever a flow
control is received.
When Flow Control off:
In half duplex mode the MAC Transmitter does not assert flow control by sending
flow control frames or jamming collision.
In full duplex mode the Mac transmitter does not send flow control frames. The
MAC receiver does not interpret or process the flow control frames. The Flow
Control Frame Received counter is not incremented.
- 1 - Half Duplex - Only in 10/100 mode
- 0 - Full Duplex
- 1 - 10Mbps
- 0 - 100Mbps
5
A-FC
2
C (R/W)
4
Port Mode
Zarlink Semiconductor Inc.
ZL50418
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