S3C7044 Samsung semiconductor, S3C7044 Datasheet - Page 11

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S3C7044

Manufacturer Part Number
S3C7044
Description
The S3C7044/C7048 single-chip CMOS microcontroller has been designed for very high-performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Ar
Manufacturer
Samsung semiconductor
Datasheet
S3C7044/C7048/P7048
NOTE: Parentheses indicate pin number for 44 QFP package.
SCK
SO
SI
BTCO
INT0, INT1
INT2
INT4
TCLO0
TCLO1
CLO
BUZ
TCL0
TCL1
KS0–KS3
KS4–KS7
V
V
RESET
X
TEST
NC
in
DD
SS
, X
Pin Name
out
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
Table 1-1. S3C7044/C7048 Pin Descriptions (Continued)
Serial I/O interface clock signal
Serial data output
Serial data input
Basic timer clock output (2 Hz, 16 Hz, 64 Hz, or 256
Hz at 4.19 MHz)
External interrupts. The triggering edge for INT0 and
INT1 is selectable. INT0 is synchronized to system
clock.
Quasi-interrupt with detection of rising edges
External interrupt with detection of rising and falling
edges.
Timer/counter 0 clock output
Timer/counter 1 clock output
Clock output
2 kHz, 4 kHz, 8 kHz, or 16 kHz frequency output at
4.19 MHz for buzzer sound
External clock input for timer/counter 0
External clock input for timer/counter 1
Quasi-interrupt inputs with falling edge detection
Power supply
Ground
Reset signal
Crystal, ceramic, or RC oscillator signal for system
clock (For external clock input, use X
X
Test signal input (must be connected to V
No connection (must be connected to V
in
's reverse phase to X
Description
out
)
in
and input
SS
SS
)
)
(20, 19)
(15–12)
(33, 34)
Number
12 (28)
11 (27)
10 (26)
20 (38)
19 (37)
21 (39)
42 (16)
22 (40)
(11–8)
37–34
41–38
33, 32
9 (25)
2 (18)
1 (17)
8 (24)
7 (23)
6 (22)
5 (21)
31 (5)
(7, 6)
4, 3
PRODUCT OVERVIEW
P1.0, P1.1
P6.0–P6.3
P7.0–P7.3
Share
P0.0
P0.1
P0.2
P0.3
P1.2
P1.3
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
Pin
1-11

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