S3C7044 Samsung semiconductor, S3C7044 Datasheet - Page 32

• Manufacturer Part Number: S3C7044
• Description: The S3C7044/C7048 single-chip CMOS microcontroller has been designed for very high-performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Ar
• Manufacturer: Samsung semiconductor

S3C7044/C7048/P7048
NOTE: ( ) means the 44-QFP OTP pin number.
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the V
operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 15-3 below.
NOTE: "0" means Low level; "1" means High level.
Program Memory
Operating Voltage (V
OTP Programming Mode
Pin Configuration
EPROM Programmability
Main Chip
Pin Name
V DD
V
5 V
RESET
TEST
DD
P3.0
P3.1
/V
Characteristic
SS
(TEST)
12.5 V
12.5 V
12.5 V
Vpp
5 V
V
Pin Name
V
PP
RESET
Table 15-2. Comparison of S3P7048 and S3C7044/C7048 Features
Table 15-1. Descriptions of Pins Used to Read/Write the EPROM
SDAT
SCLK
DD
DD
(TEST)
)
/V
REG/
MEM
SS
0
0
0
1
Table 15-3. Operating Mode Selection Criteria
8 K-byte EPROM
2.0 V to 5.5 V
V
42SDIP, 44QFP
User Program 1 time
PP
DD
(TEST) pin of the S3P7048, the EPROM programming mode is entered. The
21/42(39/16)
= 5 V, V
Pin No.
19 (37)
20 (38)
22 (40)
31 (5)
(A15-A0)
Address
0E3FH
0000H
0000H
0000H
PP
(TEST)=12.5V
S3P7048
During Programming
I/O
I/O
I/O
I
I
I
R/W
Serial data pin. Output port when reading and
input port when writing. Can be assigned as a
Input/push-pull output port.
Serial clock pin. Input only pin.
Power supply pin for EPROM cell writing
(indicates that OTP enters into the writing
mode). When 12.5 V is applied, OTP is in writing
mode and when 5 V is applied, OTP is in reading
mode. (Option)
Chip initialization
Logic power supply pin. V
+5 V during programming.
1
0
1
0
EPROM read
EPROM program
EPROM verify
EPROM read protection
4 K-byte mask ROM: S3C7044
8 K-byte mask ROM: S3C7048
1.8 V to 5.5V
42SDIP, 44QFP
Programmed at the factory
Function
S3C7044/C7048
DD
Mode
should be tied to
S3P7048 OTP
15-3