S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 81

• Manufacturer Part Number: S3C72G9
• Description: The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
• Manufacturer: Samsung semiconductor

 

RET
Operation:
Description:
Example:
SP + 1
SP + 2
SP + 3
SP + 4
SP + 5
SP + 6
SP

RET pops the PC values successively from the stack, incrementing the stack pointer by six.
Program execution continues from the resulting address, generally the instruction immediately
following a CALL, LCALL or CALLS.
The stack pointer contains the value 0FAH. RAM locations 0FAH, 0FBH, 0FCH, and 0FDH
contain 1H, 0H, 5H, and 2H, respectively. The instruction
RET
leaves the stack pointer with the new value of 00H and program execution continues from location
0125H.
During a return from subroutine, PC values are popped from stack locations as follows:
(0FAH)
(0FBH)
(0FCH)
(0FDH)
(0FEH)
(0FFH)
(000H)
Operand
Operand
–
–
0
0
0
Return from subroutine
1
PC14
PC11 - PC8
PC3 - PC0
PC7 - PC4
0
0
1
PC13
EMB


0
0
Binary Code
Operation Summary
0
PC12
ERB
0
0
1
0
1
PC14-8
PC7-0
EMB,ERB
SP
SP+6
Operation Notation
(SP+3) (SP+2)
(SP+1) (SP)

 


(SP+5) (SP+4)
Bytes
1
Cycles
3