S3C72G9 Samsung semiconductor, S3C72G9 Datasheet - Page 94

• Manufacturer Part Number: S3C72G9
• Description: The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
• Manufacturer: Samsung semiconductor

 


 
XCHD
Operation:
Description:
Example:

dst,src
A,@HL
The instruction XCHD exchanges the contents of the accumulator with the RAM location
addressed by register pair HL and then decrements the contents of register L. If the content of
register L is 0FH, the next instruction is skipped. The value of the carry flag is unaffected.
A,@HL
Register pair HL contains the address 20H and internal RAM location 20H contains the value 0FH:
YYY
The 'JPS YYY' instruction is executed since a skip occurs after the XCHD instruction.
Operand
Operand
LD
LD
XCHD
JPS
JPS
XCHD



Exchange A and data memory contents; decrement
contents of register L and skip on borrow
0
1
HL,#20H
A,#0H
A,@HL
XXX
YYY
A,@HL
1
Binary Code


Operation Summary
1
; Skipped since a borrow occurred
; A
; H
; (2FH)
1
0
2H, L
0FH and L
0FH, A
1
0FH
1
A
skip if L = 0FH
L - 1, (HL)
(2FH), L
(HL), then L
Operation Notation
L - 1 = 0EH
"0"
Bytes
1
L-1;

 
Cycles
2 + S