PC87200VUL160A NSC [National Semiconductor], PC87200VUL160A Datasheet - Page 20

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PC87200VUL160A

Manufacturer Part Number
PC87200VUL160A
Description
PC87200 PCI to ISA Bridge
Manufacturer
NSC [National Semiconductor]
Datasheet
7.0 Register Descriptions
Index 45h-4Fh
Index 50h
Index 51h
Index 52h
2:0
7:4
3:0
Bit
6
5
4
3
2
1
0
7
6
5
4
3
7
6
5
4
3
2
1
0
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
X-Bus Warm Start
Write only: 0 = NOP; 1 = Execute system wide reset (used only for clock configuration at power-up)
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
ISA Clock Divisor — Determines the divisor of the PCI clock used to generate the ISA bus clock:
010 = Divide by three (ISA clock = 11MHz)
011 = Divide by four (ISA clock = 8.33 MHz)
All other values are invalid and can produce unexpected results.
8-Bit I/O Recovery — These bits determine the number of ISA bus clocks between back-to-back 8-bit I/O read
cycles. This count is in addition to a preset one-clock delay built into the controller.
0000 = 1 PCI clock1101 = 14 PCI clocks
0001 = 2 PCI clocks1110 = 15 PCI clocks
:::1111 = 16 PCI clocks
16-Bit I/O Recovery — These bits determine the number of ISA bus clocks between back-to-back 16-bit I/O
cycles. This count is in addition to a preset one-clock delay built into the controller.
0000 = 1 PCI clock1101 = 14 PCI clocks
0001 = 2 PCI clocks1110 = 15 PCI clocks
:::1111 = 16 PCI clocks
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
Internal use, do not overwrite.
ROM 1MB Enable — Allow addressing to 512K or 1MB ROM (FFF00000h-FFFFFFFFh):
0 = Disable; 1 = Enable.
Internal use, do not overwrite.
Internal use, do not overwrite.
Table 4. Bridge Configuration Registers (Continued)
ISA I/O Recovery Control Register (R/W)
(Continued)
Internal use, do not overwrite
ROM Control Register (R/W)
ISA CLK Divider (R/W)
20
Description
Reset Value = 43h
Reset Value = 43h
Reset Value = 04h
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