HI-3717PCI HOLTIC [Holt Integrated Circuits], HI-3717PCI Datasheet - Page 9
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HI-3717PCI
Manufacturer Part Number
HI-3717PCI
Description
Single-Rail ARINC 717 Protocol IC with SPI Interface
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
1.HI-3717PCI.pdf
(23 pages)
ARINC 717 MESSAGE AND BIT ORDERING
ARINC 717 messages consist of 12-bit words sent in a 4 second
frame divided into four 1 second subframes. Each subframe
consists of 64 (basic rate), 128, 256, 512, 1024, 2048, 4096 or
8192 12 bit words, depending on the data rate of the target
system.
The first word of each subframe contains a unique Barker Code
synchronization pattern that identifies the subframe. The octal
synchronization code for subframes 1 through 4 are 1107, 2507,
5107 and 6670 respectively.
ARINC717 Message as received / transmitted on the ARINC 717 serial bus
ARINC717 Subframe Format
ARINC 717 Message as transferred on the SPI bus
Example 1. Write Transmit FIFO Subframe Sync or Data Word
Example 2. Read Receive FIFO Subframe Sync or Data Word
SPI Op-Code
Example 3. Fast Write Transmit FIFO Subframe Sync or Data Word
Example 4. Write Word Count Utility Register, WRDCNT
MSB
Example 5. Read Receive FIFO Data Word with Word Count
LSB
MSB
MSB
MSB
1
LSB
0
1
0
0
MSB
1
1st Subframe Sync Code (1107)
1
1 1 1 0 1 0 0
1 1 0 0 1 1 0
0
1 1 1 0 0 1 0
1 1 1 1 1 1 0
SPI Op-Code
SPI Op-Code
SPI Op-Code
Subframe 1
SPI Op-Code
1
1 Second
1
0
0 11
0
Subframe Sync or Data Word Bits
10
0
time
1
9
MSB
LSB
LSB
LSB
LSB
0
8
0
MSB
MSB
MSB
LSB
12
MSB
X
Don’t Care
0
Always “0”
Always “0”
0
7
1
11
X
0
0 0
6 5 4
0 0
Subframe 2
10
X
0
1 Second
MSB
X 11
0 11
9 8
0
LSB
Word Count Bits
11
0
3
Subframe Sync or Data Word Bits
Subframe Sync or Data Word Bits
Subframe Sync or Data Word Bits
10
10
10
1
7
2 1
FIGURE 5.
2
9
9
6
9
4 Seconds
MSB
Frame
3
8
8
LSB
5
8
2nd Data Word
0
HOLT INTEGRATED CIRCUITS
4
LSB
1 Second
7
7
4
7
5
6 5 4
6 5 4
3 2 1
6 5 4
6
Subframe 3
1 Second
ARINC 717 & SPI Bit Ordering
7
8
HI-3717
3
3
0
3
9
(Op-Code 0x72)
10
2 1
2 1
X 1
2 1
Sync Bits
9
MSB
11
MSB
(Op-Code 0xFE)
The first 12- bit word of a subframe that appears on the ARINC 717
bus is the synchronization code with the least significant bit (LSB)
first. This is immediately followed by up to 8191 12-bit data words,
all within1 second from the start of the synchronization code. The
next three subframes immediately follow the first subframe with
their synchronization code as the first 12-bit word of the subframe
followed by the same number of data words as the first subframe.
ARINC 717 data is transmitted between the HI-3717 and host
microcontroller using the four-wire Serial Peripheral Interface
(SPI). A read or write operation consists of a single-byte op-code
followed by 8-bit data words. Figure 5 shows examples of how the
SPI data bytes are mapped to the ARINC 717 message.
LSB
LSB
LSB
LSB
(Op-Code 0xF6)
0
(Op-Code 0x74)
0
0
0
LSB
MSB
12
LSB
(Op-Code 0x2-)
0
11
Subframe 4
1
1 Second
10
.
2
9 8
3
Word Count Bits
Nth Data Word
.
4
.
.
7
5 6 7
6
MSB
.
5
8
4
9 10
3 2 1
MSB
11
Always “0”
0
0 1
Sync Bits
LSB
0