AT52BR3224A-70CI ATMEL [ATMEL Corporation], AT52BR3224A-70CI Datasheet - Page 13
AT52BR3224A-70CI
Manufacturer Part Number
AT52BR3224A-70CI
Description
32-megabit Flash + 4-megabit/ 8-megabit SRAM Stack Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT52BR3224A-70CI.pdf
(46 pages)
- Current page: 13 of 46
- Download datasheet (365Kb)
Status Bit Table
Notes:
3338B–STKD–6/03
Configuration Register
Programming
Erasing
Erase Suspended & Read
Erasing Sector
Erase Suspended & Read
Non-erasing Sector
Erase Suspended &
Program Non-erasing Sector
1. I/O5 switches to a “1” when a program or an erase operation has exceeded the maximum time limits or when a program or
2. I/O3 switches to a “1” when the V
sector erase operation is performed on a protected sector.
DATA
I/O7
I/O7
I/O7
00
0
1
PP
level is not high enough to successfully perform program and erase operations.
DATA
I/O7
01
0
0
1
0
TOGGLE
TOGGLE
TOGGLE
00/01
DATA
I/O6
1
Status Bit
AT52BR3224A(T)/3228A(T)
I/O5
00/01
DATA
0
0
0
0
(1)
I/O3
00/01
DATA
0
0
0
0
(2)
TOGGLE
TOGGLE
TOGGLE
00/01
DATA
I/O2
1
RDY/BUSY
00/01
0
0
1
1
0
13
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