S72NS-N SPANSION [SPANSION], S72NS-N Datasheet - Page 16

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S72NS-N

Manufacturer Part Number
S72NS-N
Description
Based MCPs
Manufacturer
SPANSION [SPANSION]
Datasheet
14
S29NS-N Revision Summary
SDRAM Type 1 Revision Summary
SDRAM Type 5 Revision Summary
Revision B1 (November 9, 2005)
Added DDR DRAM Type 5 Information
Updated General Description, Product Selector Guide, Ordering Information, and Valid Combina-
tions with DDR DRAM Type 5 Information.
S29NS-N Flash Module
Removed all of the Revision Summary except for A4 (request from customer).
SDRAM (Micron) Revision Summary
Removed all of the Revision Summary except for A1 (request from customer).
SDRAM (Elpida) Revision Summary
New SDRAM to be added to MCP
Revision A4 Flash Module (April 21, 2005)
Global Changes
Removed all ordering options and package information listed in revision A4 of the discrete data sheet.
Removed 54 MHz speed option.
Changed ACC to V
Read Access Times
Removed burst access for 54MHz.
Defined asynchronous random access and synchronous random access to 80 ns for all speed options.
DC Characteristics
CMOS Compatible Table.
Updated I
Revision A2 (November 1, 2005)
Features
Changed V
Indicated temperature range (-40°C to 85°C)
Stopping the External Clock
Removed information that limited the rate of frequency change.
IDD Specifications and Conditions table
Specifications and conditions updated.
Electrical Characteristics and Recommended AC Operating Conditions table
Removed t
Revision A0 (September 30, 2005)
Initial release. New SDRAM module.
CC3
REFC
DD
/V
and I
DDQ
parameter
PP.
CC6
range from 1.7 V-1.9 V to 1.7 V-1.95 V
values from 40 µA to 70 µA.
A d v a n c e
S72NS-N Based MCPs
I n f o r m a t i o n
S72NS128_256ND0_00_B1 November 9, 2005

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