S72NS-N SPANSION [SPANSION], S72NS-N Datasheet - Page 5
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S72NS-N
Manufacturer Part Number
S72NS-N
Description
Based MCPs
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S72NS-N.pdf
(17 pages)
1
Notes:
1.
2.
3.
November 9, 2005 S72NS128_256ND0_00_B1
D-Amax - D-A0
Amax indicates highest address bit for memory component:
a. Amax = A23 for NS256N, A22 for NS128N
b. Amax = A11 for 128 Mb DDR DRAM, A12 for 256-Mb DDR DRAM
For Flash, A0 – A15 is tied to DQ0 – DQ15.
For the NS512N, two NS-N devices are included. All signals are common to both except for CE#. F-CE# becomes F1-CE#, while the CE#
for the second flash is F2-CE#. This way, the two NS-N devices are separately accessed.
MCP Block Diagrams
D-RAS#
D-CAS#
F-RST#
F2-CE#
D-WE#
F-WP#
F-WE#
D-V
F-OE#
F-CE#
D-BA0
D-BA1
D-CKE
AVD#
F-V
D-V
F-V
CCQ
SS
PP
CC
A d v a n c e
V
RST#
V
WP#
CE#
OE#
WE#
AVD#
V
RAS#
CAS#
BA0
BA1
CKE
WE#
V
CCQ
PP
SS
CC
Second NS-N (if needed)
Figure 1.1. MCP Block Diagram
I n f o r m a t i o n
S72NS-N Based MCPs
Memory
Memory
DRAM
Flash
NS-N
MUX
DDR
DQ15-DQ0
DQ15-DQ0
A16-Amax
A15-A0
UDQM
LDQM
DQS0
DQS1
CLK#
TEST
V
V
RDY
CLK
CLK
V
V
CCQ
SSQ
CC
SS
(Note
ADQ15-ADQ0
F-CLK
F-RDY
A16-Amax
F-V
F-V
3)
D-CLK
D-CLK#
D-LDQS
D-UDQS
D-LDQM
D-UDQM
D-TEST
D-DQ15 - D-DQ0
D-V
D-V
CC
CCQ
SS
SSQ
3