S71AL016D SPANSION [SPANSION], S71AL016D Datasheet - Page 26
S71AL016D
Manufacturer Part Number
S71AL016D
Description
Stacked Multi-Chip Product (MCP) Flash Memory and RAM
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S71AL016D.pdf
(76 pages)
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A d v a n c e
I n f o r m a t i o n
Logical Inhibit
Write cycles are inhibited by holding any one of OE# = V
, CE# = V
or WE# =
IL
IH
V
. To initiate a write cycle, CE# and WE# must be a logical zero while OE# is a
IH
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
and OE# = V
during power up, the device does not accept
IL
IH
commands on the rising edge of WE#. The internal state machine is automatically
reset to reading array data on power-up.
26
S29AL016D
S29AL016D_00_A1_E August 4, 2004
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