S71AL016D SPANSION [SPANSION], S71AL016D Datasheet - Page 70

• Manufacturer Part Number: S71AL016D
• Description: Stacked Multi-Chip Product (MCP) Flash Memory and RAM
• Manufacturer: SPANSION [SPANSION]

Switching Characteristics
Notes:
1. Test conditions assume signal transition time of 5 ns or less, timing reference levels of V
2. At any given temperature and voltage condition, t
3. If both byte enables are toggled together this value is 10ns.
4. t
5. The internal write time of the memory is defined by the overlap of WE#, CE# = V
70
V
t
must be Active to initiate a write, and any of these signals can terminate a write by going Inactive. The data input set-up and
hold timing should be referenced to the edge of the signal that terminates the write.
HZWE
HZOE
CC(typ.)
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle (note 5)
t
t
t
t
t
t
t
t
t
t
t
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
BW
SD
HD
HZWE
LZWE
, t
is less than t
Parameter
HZCE
(note 3)
, and output loading of the specified IOL/IOH and 30 pF load capacitance.
, t
HZBE
, and t
LZWE
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE# Low to Data Valid
OE# Low to Data Valid
OE# Low to Low Z (note 2)
OE# High to High Z (note 2, 4)
CE# Low to Low Z (note 2)
CE# High to High Z (note 2, 4)
CE# Low to Power-Up
CE# High to Power-Down
BHE# / BLE# Low to Data Valid
BHE# / BLE# Low to Low Z (note 2)
BHE# / BLE# High to High Z (note 2, 4)
Write Cycle Time
CE# Low to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE# Pulse Width
BHE# / BLE# Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE# Low to High Z (note 2, 4)
WE# High to Low Z (note 2)
for any given device.
HZWE
transitions are measured when the outputs enter a high impedance state.
Description
HZCE
2Mbit Type 2 SRAM
is less than t
P r e l i m i n a r y
LZCE
, t
HZBE
is less than t
IL
Min
55
10
10
55
45
45
45
50
25
, BHE# and/or BLE# = V
5
0
5
0
0
0
5
55 ns
CC(typ.)
Max
20
20
20
20
55
55
25
55
55
LZBE
, t
/2, input pulse levels of 0 to
HZOE
Min
SRAM_Type04_04A0 August 4, 2004
70
10
10
70
60
60
50
60
30
5
0
5
0
0
0
5
70 ns
is less than t
Max
70
70
35
25
25
70
70
25
25
IL
. All signals
Unit
ns
ns
LZOE
, and