K4T56043QF-GCD5 SAMSUNG [Samsung semiconductor], K4T56043QF-GCD5 Datasheet - Page 5
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K4T56043QF-GCD5
Manufacturer Part Number
K4T56043QF-GCD5
Description
256Mb F-die DDR2 SDRAM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.K4T56043QF-GCD5.pdf
(27 pages)
256Mb F-die DDR2 SDRAM
Notes:
1.
2.
3.
4.
Ball Locations (x8)
Pins B3 and A2 have identical capacitance as pins B7 and A8.
For a read, when enabled, strobe pair RDQS & RDQS are identical in function and timing to strobe pair DQS
& DQS and input masking function is disabled.
The function of DM or RDQS/RDQS are enabled by EMRS command.
VDDL and VSSDL are power and ground for the DLL.
x8 package pinout (Top View) : 60ball FBGA Package
A
B
C
D
G
H
K
E
F
J
L
VDDQ
VDDL
Top View (See the balls through the Package)
VDD
DQ6
DQ4
VSS
VDD
NC
1
+
+
+
1
RDQS
VSSQ
VSSQ
VREF
DQ1
CKE
BA0
NU/
A10
A12
2
A3
A7
2
+ : Depopulated Ball
: Populated Ball
3
RDQS
VDDQ
DQ3
VSS
VSS
BA1
DM/
WE
NC
A1
A5
A9
+
+
+
+
+
+
+
+
+
+
+
3
4
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5
G
A
B
C
D
E
H
K
F
J
L
+
+
+
+
+
+
+
+
+
+
+
6
VSSDL
VDDQ
VSSQ
DQS
DQ2
RAS
CAS
A11
NC
7
A2
A6
7
8
VSSQ
VSSQ
DQS
DQ0
NC
CK
CK
CS
A0
A4
A8
+
+
+
8
9
VDDQ
VDDQ
VDD
ODT
VDD
DQ7
DQ5
VSS
9
Rev. 1.5 Feb. 2005
DDR2 SDRAM