M470L1624FT0-CA2 SAMSUNG [Samsung semiconductor], M470L1624FT0-CA2 Datasheet - Page 11

no-image

M470L1624FT0-CA2

Manufacturer Part Number
M470L1624FT0-CA2
Description
DDR SDRAM SODIMM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
128MB, 256MB SODIMM
Note 1. VID is the magnitude of the difference between the input level on CK and the input on CK.
Input/Output Capacitance
AC Operating Conditions
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
Input Differential Voltage, CK and CK inputs
Input Crossing Point Voltage, CK and CK inputs
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0, CKE1)
Input capacitance( CS0, CS1)
Input capacitance( CLK0, CLK1,CLK2)
Input capacitance(DM0~DM7,DM8(for ECC))
Data & DQS input/output capacitance(DQ0~DQ63)
Data input/output capacitance (CB0~CB7)
2. The value of V
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in simula-
tion. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
Parameter/Condition
IX
Parameter
is expected to equal 0.5*V
Output
Output Load Circuit (SSTL_2)
DDQ
Z0=50Ω
of the transmitting device and must track variations in the DC level of the same.
C
LOAD
Symbol
Cout1
Cout2
CIN1
CIN2
CIN3
CIN4
CIN5
=30pF
V
tt
Symbol
VIH(AC)
VIL(AC)
VID(AC)
VIX(AC)
=0.5*V
M470L1624FT0
Min
41
34
34
25
R
6
6
-
DDQ
T
=50Ω
0.5*VDDQ-0.2
VREF + 0.31
V
=0.5*V
REF
Max
45
38
38
30
7
7
-
Min
0.7
DDQ
(VDD=2.5V, VDDQ=2.5V, TA= 25°C, f=1MHz)
M470L3224FT0
Min
49
42
42
25
6
6
-
0.5*VDDQ+0.2
VREF - 0.31
VDDQ+0.6
Rev. 1.2 March 2004
Max
Max
57
50
50
30
7
7
-
DDR SDRAM
M485L1624FT0
Min
41
34
34
25
6
6
6
Unit
V
V
V
V
Max
45
38
38
30
7
7
7
Note
Unit
3
2
3
1
pF
pF
pF
pF
pF
pF
pF

Related parts for M470L1624FT0-CA2