M470L3324CU0-CA2 SAMSUNG [Samsung semiconductor], M470L3324CU0-CA2 Datasheet - Page 10

• Manufacturer Part Number: M470L3324CU0-CA2
• Description: DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb C-die
• Manufacturer: SAMSUNG [Samsung semiconductor]

10.0 AC Operating Conditions
Note :
1. VID is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of V
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in
11.0 Input/Output Capacitance
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0,CKE1)
Input capacitance( CS0, CS1)
Input capacitance( CLK0, CLK1,CLK2)
Input capacitance(DM0~DM7)
Data & DQS input/output capacitance(DQ0~DQ63)
256MB, 512MB Unbuffered SODIMM
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
Input Differential Voltage, CK and CK inputs
Input Crossing Point Voltage, CK and CK inputs
simulation. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
IX
is expected to equal 0.5*V
Parameter/Condition
Parameter
Output
DDQ
of the transmitting device and must track variations in the DC level of the same.
Output Load Circuit (SSTL_2)
Z0=50Ω
Symbol
C
Cout1
CIN1
CIN2
CIN3
CIN4
CIN5
LOAD
=30pF
V
tt
VIH(AC)
VID(AC)
VIX(AC)
Symbol
VIL(AC)
=0.5*V
Min
41
34
34
25
M470L3324CU0
6
6
R
DDQ
T
=50Ω
0.5*VDDQ-0.2
VREF + 0.31
V
=0.5*V
REF
Min
0.7
Max
DDQ
38
30
45
38
7
7
0.5*VDDQ+0.2
VREF - 0.31
VDDQ+0.6
Max
Min
49
42
42
25
Rev. 1.2 June 2005
M470L6524CU0
6
6
DDR SDRAM
( TA= 25°C, f=100MHz)
Unit
Max
57
50
50
30
V
V
V
V
7
7
Note
Unit
3
3
1
2
pF
pF
pF
pF
pF
pF