PPC440EP-3PBFFFCX AMCC [Applied Micro Circuits Corporation], PPC440EP-3PBFFFCX Datasheet - Page 57

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PPC440EP-3PBFFFCX

Manufacturer Part Number
PPC440EP-3PBFFFCX
Description
Power PC 440EP Embedded Processor
Manufacturer
AMCC [Applied Micro Circuits Corporation]
Datasheet
Table 6. Signal Functional Description (Sheet 8 of 9)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
AMCC Proprietary
440EP – PPC440EP Embedded Processor
System Interface
SysClk
SysErr
SysReset
Halt
TmrClk
GPIO00:63
TestEn
RcvrInh
ModeCtrl
LeakTest
RefEn
DrvrInh1
DrvrInh2
PSROOut
Signal Name
Main system clock input.
Set to 1 when a machine check is generated.
Processor timer external input clock.
Main system reset. External logic can drive this bidirectional
pin low (minimum of 16 cycles) to initiate a system reset. A
system reset can also be initiated by software. Implemented as
an open-drain output (two states; 0 or open circuit).
Halt from external debugger.
General purpose I/O 0 through 63. To access these functions,
software must set DCR register bits.
Test Enable.
Receiver Inhibit. Active only when TestEn is active. Used for
manufacturing test only.
Mode Control. Active only when TestEn is active. Used for
manufacturing test only.
Leakage Test. Active only when TestEn is active. Used for
manufacturing test only.
Reference Enable. Active only when TestEn is active. Used for
manufacturing test only.
Driver Inhibit. Active only when TestEn is active. Used for
manufacturing test only.
Driver Inhibit. Active only when TestEn is active. Used for
manufacturing test only.
Module characterization and screening. Use for test purposes
only. Tie down as specified in Note 3 for normal operation.
Description
Revision 1.26 – April 25, 2007
Clock
I/O
I/O
I/O
O
O
I
I
I
I
I
I
I
I
I
Data Sheet
3.3V tolerant
3.3V tolerant
3.3V tolerant
3.3V tolerant
3.3V tolerant
2.5V CMOS
2.5V CMOS
2.5V CMOS
2.5V CMOS
2.5V CMOS
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
Perf screen
Multiplex
Multiplex
Multiplex
Multiplex
Multiplex
ring osc
Type
Notes
1, 2
1, 4
1, 3
3
57

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