PPC440GRX-NPAFFFTS AMCC [Applied Micro Circuits Corporation], PPC440GRX-NPAFFFTS Datasheet - Page 83

• Manufacturer Part Number: PPC440GRX-NPAFFFTS
• Description: PowerPC 440GRx Embedded Processor
• Manufacturer: AMCC [Applied Micro Circuits Corporation]

Revision 1.08 – October 15, 2007
The following diagram illustrates the relationship among the signals involved with a DDR write operation.
Figure 11. DDR SDRAM Write Cycle Timing
Note: The timing data in the following tables is based on simulation runs using Einstimer.
AMCC Proprietary
Preliminary Data Sheet
MemClkOut
T
T
T
T
T
T
SA
SD
HD
DS
SK
HA
MemData
PLB Clk
= Setup time for address and command signals to MemClkOut
= Delay from falling edge of MemClkOut to rising/falling edge of signal (skew)
= Setup time for data signals (minimum time data is valid before rising/falling edge of DSQ)
= Hold time for data signals (minimum time data is valid after rising/falling edge of DSQ)
= Delay from rising/falling edge of clock to the rising/falling edge of DQS
= Hold time for address and command signals from MemClkOut
DQS
Addr/Cmd
T
SA
T
SK
T
HA
T
T
440GRx – PPC440GRx Embedded Processor
SD
DS
T
HD
T
DS
T
SD
T
HD
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