K6R1008V1B SAMSUNG [Samsung semiconductor], K6R1008V1B Datasheet - Page 6

• Manufacturer Part Number: K6R1008V1B
• Description: 128Kx8 Bit High Speed Static RAM(3.3V Operating), Revolutionary Pin out. Operated at Commercial and Industrial Temperature Ranges
• Manufacturer: SAMSUNG [Samsung semiconductor]

K6R1008V1B-C/B-L, K6R1008V1B-I/B-P
TIMING WAVEFORM OF READ CYCLE(2)
TIMING WAVEFORM OF WRITE CYCLE(1)
V
Current
Address
CS
OE
Data out
Address
CS
WE
Data in
Data out
OE
CC
NOTES(READ CYCLE)
1. WE is high for read cycle.
2. All read cycle timing is referenced from the last valid address to the first transition address.
3. t
4. At any given temperature and voltage condition, t
5. Transition is measured 200mV from steady state voltage with Load(B). This parameter is sampled and not 100% tested.
6. Device is continuously selected with CS=V
7. Address valid prior to coincident with CS transition low.
8. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write
V
device.
cycle.
HZ
OL
and t
levels.
I
I
SB
CC
OHZ
are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V
High-Z
t
AS(4)
t
PU
t
LZ(4,5)
(WE=V
(OE= Clock)
t
OLZ
50%
t
IL.
AA
IH
t
OHZ(6)
)
t
CO
- 6 -
t
OE
HZ
(Max.) is less than t
t
AW
t
t
RC
CW(3)
t
WC
t
WP(2)
High-Z(8)
LZ
Valid Data
Valid Data
(Min.) both for a given device and from device to
t
DW
t
t
OHZ
t
WR(5)
DH
PRELIMINARY
CMOS SRAM
50%
t
t
t
PD
HZ(3,4,5)
OH
Preliminary
August 1998
Rev 2.1
OH
or