K6R1008V1C SAMSUNG [Samsung semiconductor], K6R1008V1C Datasheet - Page 2

• Manufacturer Part Number: K6R1008V1C
• Description: 128Kx8 Bit High-Speed CMOS Static RAM(3.3V Operating).
• Manufacturer: SAMSUNG [Samsung semiconductor]

ORDERING INFORMATION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
K6R1008V1C-C/C-L, K6R1008V1C-I/C-P
128K x 8 Bit High-Speed CMOS Static RAM(3.3V Operating)
• Fast Access Time 10,12,15ns(Max.)
• Low Power Dissipation
• Single 3.3 0.3V Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
• Three State Outputs
• 2V Minimum Data Retention : L-ver. only
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
CS
WE
OE
A
A
A
A
A
A
A
A
A
K6R1008V1C-C10/C12/C15
K6R1008V1C-I10/I12/I15
- No Clock or Refresh required
Operating K6R1008V1C-10 : 80mA(Max.)
Standby (TTL)
0
1
2
3
4
5
6
7
8
I/O
1
~I/O
8
(CMOS) : 5mA(Max.)
K6R1008V1C-J : 32-SOJ-400
K6R1008V1C-T : 32-TSOP2-400CF
K6R1008V1C-12 : 75mA(Max.)
K6R1008V1C-15 : 73mA(Max.)
Clk Gen.
: 30mA(Max.)
Cont.
0.5mA(Max.) L-ver. only
Data
Gen.
CLK
A
9
A
Pre-Charge Circuit
10
256x8 Columns
Column Select
Commercial Temp.
Industrial Temp.
Memory Array
A
11
512 Rows
I/O Circuit
A
12
A
13
A
14
A
15
A
16
- 2 -
GENERAL DESCRIPTION
PIN CONFIGURATION
PIN FUNCTION
The K6R1008V1C is a 1,048,576-bit high-speed Static Random
Access Memory organized as 131,072 words by 8 bits. The
K6R1008V1C uses 8 common input and output lines and has
an output enable pin which operates faster than address
access time at read cycle. The device is fabricated using SAM-
SUNG s advanced CMOS process and designed for high-
speed circuit technology. It is particularly well suited for use in
high-density
K6R1008V1C is packaged in a 400mil 32-pin plastic SOJ or
TSOP2 forward.
I/O
Pin Name
A
0
1
V
V
N.C
WE
CS
OE
I/O
I/O
I/O
I/O
- A
Vcc
Vss
WE
CS
~ I/O
A
A
A
A
A
A
A
A
CC
SS
0
1
2
3
4
5
6
7
1
2
3
4
16
10
11
12
13
14
15
16
8
1
2
3
4
5
6
7
8
9
high-speed
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power(+3.3V)
Ground
No Connection
TSOP2
SOJ/
system
(Top View)
Pin Function
CMOS SRAM
applications.
PRELIMINARY
PRELIMINARY
September 2001
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Revision 4.0
A
A
A
A
I/O
I/O
Vss
Vcc
I/O
I/O
A
A
A
OE
A
A
16
15
14
13
12
11
10
9
8
8
7
6
5
The
P