K7R643682M_07 SAMSUNG [Samsung semiconductor], K7R643682M_07 Datasheet - Page 10

• Manufacturer Part Number: K7R643682M_07
• Description: 2Mx36 & 4Mx18 & 8Mx9 QDR II b2 SRAM
• Manufacturer: SAMSUNG [Samsung semiconductor]

TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
Notes: 1. X means "Don′t Care".
WRITE TRUTH TABLE
Notes: 1. X means "Don′t Care".
WRITE TRUTH TABLE
Notes: 1. X means "Don′t Care".
K7R643682M
K7R641882M
K7R640982M
Stopped
K
↑
↑
↑
K
↑
↑
↑
↑
↑
2. The rising edge of clock is symbolized by (↑ ).
3. Before enter into clock stop status, all pending read and write operations will be completed.
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K (↑).
3. Assumes a WRITE cycle was initiated.
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K (↑ ).
3. Assumes a WRITE cycle was initiated.
4. This table illustrates operation for x18 devices. x9 device operation is similar except that
K
↑
↑
↑
↑
R
X
H
X
L
K
↑
↑
↑
↑
↑
K
↑
↑
↑
↑
W
X
H
X
L
(x18)
(x36)
BW
H
H
H
H
H
H
L
L
L
L
0
Previous state
Din at K(t)
BW
D(A0)
H
H
H
H
L
L
L
L
X
X
0
BW
H
H
H
H
H
H
L
L
L
L
1
D
2Mx36 & 4Mx18 & 8Mx9 QDR
BW
BW
Previous state
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
Din at K(t)
1
2
D(A1)
X
X
- 10 -
BW
H
H
H
H
H
H
L
L
L
L
3
D
Previous state
OUT
High-Z
Q(A0)
at C(t+1)
X
BW
WRITE ALL BYTEs (K↑ )
WRITE ALL BYTEs (K↑ )
WRITE NOTHING (K↑ )
WRITE NOTHING (K↑ )
WRITE BYTE 2 and BYTE 3 (K↑ )
WRITE BYTE 2 and BYTE 3 (K↑ )
WRITE BYTE 0 (K↑ )
WRITE BYTE 0 (K↑ )
WRITE BYTE 1 (K↑ )
WRITE BYTE 1 (K↑ )
controls D0:D8.
WRITE ALL BYTEs (K↑ )
WRITE ALL BYTEs (K↑ )
OPERATION
WRITE NOTHING (K↑ )
WRITE NOTHING (K↑ )
WRITE BYTE 0 (K↑ )
WRITE BYTE 0 (K↑ )
WRITE BYTE 1 (K↑ )
WRITE BYTE 1 (K↑ )
Q
D
Previous state
OPERATION
Rev. 1.3 March 2007
OUT
High-Z
Q(A1)
at C(t+2)
X
TM
II b2 SRAM
No Operation
OPERATION
Clock Stop
Read
Write