H57V2582GTR-60J HYNIX [Hynix Semiconductor], H57V2582GTR-60J Datasheet - Page 10
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H57V2582GTR-60J
Manufacturer Part Number
H57V2582GTR-60J
Description
256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.H57V2582GTR-60J.pdf
(22 pages)
DC CHARACTERISTICS II
Note: 1. I
Rev 1.0 / Aug. 2009
Operating Current
Precharge Standby
Current
in Power Down Mode
Precharge Standby
Current
in Non Power Down
Mode
Active Standby Cur-
rent
in Power Down Mode
Active Standby
Current in Non Power
Down Mode
Burst Mode Operating
Current
Auto Refresh Current
Self Refresh Current
2. Min. of tRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II
3. H57V2562GTR-XXI Series: Normal,
Parameter
DD1
and I
DD4
depend on output loading and cycle rates. Specified values are measured with the output open.
I
I
I
I
I
I
I
I
I
I
I
I
Symbol
DD1
DD2P
DD2PS
DD2N
DD2NS
DD3P
DD3PS
DD3N
DD3NS
DD4
DD5
DD6
Burst length=1, One bank active
t
CKE ≤ V
CKE ≤ V
CKE ≥ V
Input signals are changed one time during
2clks.
All other pins ≥ V
CKE ≥ V
Input signals are stable.
CKE ≤ V
CKE ≤ V
CKE ≥ V
Input signals are changed one time during
2clks.
All other pins ≥ V
CKE ≥ V
Input signals are stable.
t
t
CKE ≤ 0.2V
RC
CK
All banks active
RC
(TA= -40 to 85
H57V2562GTR-XXJ Series: Low Power
≥ t
≥ t
≥ t
CK
RC
RC
IH
IH
IL
IL
IH
IL
IL
IH
(min), I
(min), I
(min), All banks active
(max), t
(max), t
(max), t
(max), t
(min), CS ≥ V
(min), t
(min), CS ≥ V
(min), t
Test Condition
OL
OL
DD
DD
CK
CK
o
CK
CK
CK
CK
C)
=0mA
=0mA
-0.2V or ≤ 0.2V
-0.2V or ≤ 0.2V
= ∞
= ∞
= 15ns
= ∞
= 15ns
= ∞
IH
IH
(min), t
(min), t
Synchronous DRAM Memory 256Mbit
Low Power
CK
CK
Normal
= 15ns
= 15ns
H57V2582GTR-xxI Series
166
100
160
90
Speed
15
28
20
2
2
8
5
5
2
1
133
140
70
80
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
Note
1
1
2
3
10