H57V2582GTR-60J HYNIX [Hynix Semiconductor], H57V2582GTR-60J Datasheet - Page 11
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H57V2582GTR-60J
Manufacturer Part Number
H57V2582GTR-60J
Description
256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.H57V2582GTR-60J.pdf
(22 pages)
AC CHARACTERISTICS I
Note:
1. Assume t
2. Access time to be measured with input signals of 1V/ns edge rate, from 0.8V to 0.2V. If t
to the parameter.
Rev 1.0 / Aug. 2009
System Clock Cycle Time
Clock High Pulse Width
Clock Low Pulse Width
Access Time From Clock
Data-out Hold Time
Data-Input Setup Time
Data-Input Hold Time
Address Setup Time
Address Hold Time
CKE Setup Time
CKE Hold Time
Command Setup Time
Command Hold Time
CLK to Data Output in Low-Z Time
CLK to Data Output in High-Z
Time
R
/ t
F
(input rise and fall time) is 1ns. If t
Parameter
(AC operating conditions unless otherwise noted)
CL = 3
CL = 2
CL = 3
CL = 2
CL = 3
CL = 2
R
& t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
CK3
CK2
CHW
CLW
AC3
AC2
OH
DS
DH
AS
AH
CKS
CKH
CS
CH
OLZ
OHZ3
OHZ2
F
> 1ns, then [(t
Min
6.0
2.5
2.5
2.0
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
1.0
2.7
-
-
-
-
R
+t
166
Synchronous DRAM Memory 256Mbit
F
)/2-1]ns should be added to the parameter.
1000
1000
Max
5.4
5.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R
> 1ns, then (t
Min
7.5
2.5
2.5
2.5
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
1.0
2.7
10
3
-
-
H57V2582GTR-xxI Series
133
Max
1000
1000
5.4
5.4
6
6
R
-
-
-
-
-
-
-
-
-
-
-
-
/2-0.5)ns should be added
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
1
2
2
1
1
1
1
1
1
1
1
11