ADC-8032A ETC [List of Unclassifed Manufacturers], ADC-8032A Datasheet - Page 34

• Manufacturer Part Number: ADC-8032A
• Description: Analog Composite to SDI Decoder
• Manufacturer: ETC [List of Unclassifed Manufacturers]

4-16 • Using Banks
Bank
Bank
C
C
SW1 Function Select
SW1 Function Select
Bank C-1: Timing Mode Procedure
Use the following steps to set the timing mode:
Bank C-2: H Delay
Use the following steps to adjust the output’s H Delay:
Please note the following important points regarding H Delay:
1
2
1. Select Bank C, and rotate Function Select to position 1.
2. Select the desired timing mode according to the following table.
1. Select Bank C, and rotate Function Select to position 2.
2. Increase or decrease the H Delay as required:
•
•
•
If you cross over the maximum H Delay, the value returns to 0 (zero) and the V
Delay value increments by 1.
Crossing the minimum delay returns the H Delay value to 1715 (NTSC) or 1725
(PAL) and decrements the V Delay value by 1.
Sub-pixel timing adjustments can be made using the RV1 Fine Phase Adjust
potentiometer on the front edge of the card. Turning the pot clockwise increases
delay, whereas turning it counter-clockwise decreases the delay. The range is
approximately 45 ns, which is slightly longer than the step size of the H Delay
function.
•
•
•
•
•
•
Toggle Mode Select up to advance up the list.
Toggle Mode Select down to descend down the list.
* Indicates ADC-8032A-S only
Toggle Mode Select up to increase H Delay by half a pixel (one 27MHz-
clock period) with each toggle.
Hold Mode Select up to increase H Delay continuously.
Toggle Mode Select down to decrease H Delay by half a pixel (one
27MHz-clock period) with each toggle.
Hold Mode Select down to decrease H Delay continuously.
SW2 Mode Select
SW2 Mode Select
+
-
+
-
Frame Delay *
Line Sync
Frame Sync *
Line Delay
Increase
Decrease
TIME MODE
H DELAY
Heads-Up Display Label
Heads-Up Display Label
(#)
ADC-8032A User Manual (Iss. 04)
FD
LS
LD
FS
LS
(FS on S
models)
Default
Default
0