LC89057W-VF4A-E SANYO [Sanyo Semicon Device], LC89057W-VF4A-E Datasheet - Page 35

• Manufacturer Part Number: LC89057W-VF4A-E
• Description: Digital Audio Interface Transceiver
• Manufacturer: SANYO [Sanyo Semicon Device]

12. Microcontroller Interface (
12.1 Description of Microcontroller Interface
12.1.1 Interrupt output (
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12.1.2 CCB format
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Interrupts are output when a change has occurred in the PLL lock status or output data information.
Interrupt output consists of the register for selecting the interrupt source, the
and the registers that store the interrupt source data.
Normally
according to the INTOPF setting.
INTOPF determines whether to hold the "L" pulse for a certain period and then clear it ("H"), or to clear it at a time
when the output register is read.
The interrupt sources can be selected among the following items. Multiple sources can be selected at the same time
with the contents of CCB address 0xE8 and command address 0x08.
interrupt sources.
INT output = (selected source 1) + (selected source 2) + ... + (selected source n)
The contents of set interrupt source are saved in output registers DO8 to DO15 of CCB address 0xEA, when the
source occurs. However, for the read registers for source items 1 and 5, the each status of the RERR and
are output at the time of reading. Other data except for source items 1 and 5 are saved in the registers upon occurrence
of an interrupt source.
Concerning source items 2 and 3, the oscillation amplifier clock is used. Therefore, if the status is monitored even
while the PLL is locked, the oscillation amplifier must be set to the continuous operation mode.
Clearing
0xEA is set.
The pulse width of the setting in which the
pulse output mode is somewhere between 1/2fs and 3/2fs for one interrupt source.
The various function settings as well as information writing and reading are performed with the microcontroller
interface.
The data format of the microcontroller interface conforms to Sanyo's original serial bus format (CCB), but three-state
is employed instead of open-drain for the data output format.
Data input/output is performed following CCB address input. For the data input/output timing, see the input/output
timing chart.
Function setting data input
CS data input
Interrupt data output
fs data output
CS data output
Pc data output
______
No.
1
2
3
4
5
6
7
8
Register I/O contents
INT at the same time of readout of an output register is carried out immediately after the output register
______
Command Name
INT outputs "L" upon occurrence of an interrupt while "H" is output. Following "L" output, it returns to "H"
______
CSRNW
PCRNW
ERROR
UNPCM
FSCHG
INDET
SLIPO
EMPF
Table 12.2 Relationship between Register I/O Contents and CCB Addresses
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Output when RERR pin status has changed
Output when input data pin status has changed (subject to oscillation amplifier operation condition)
Output when input fs calculation result has changed. (subject to oscillation amplifier condition)
Output when channel status data of first 48 bits have updated
Output when
Output when burst preamble Pc has been updated
Output when data is read twice during slave setting and missing data is detected
Output when emphasis information has changed
INT)
Write
Write
Read
Read
Read
Read
R/W
Table 12.1 Interrupt Source Setting Contents
______
AUDIO pin status has changed
_____
INT , CL, CE, DI, DO)
INT output following the occurrence of an interrupt source is set to the "L"
______
CCB address
LC89057W-VF4A-E
0xED
0xE8
0xEA
0xEB
0xEC
0xE9
B0
0
1
0
1
0
1
Description
B1
0
0
1
1
0
0
INT outputs OR calculation result of the selected
______
B2
0
0
0
0
1
1
INT pin that outputs that state transition,
______
B3
1
1
1
1
1
1
A0
0
0
0
0
0
0
A1
1
1
1
1
1
1
AUDIO pins
____________
A2
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1
1
1
1
1
1
A3
1
1
1
1
1
1