LC89057W-VF4A-E SANYO [Sanyo Semicon Device], LC89057W-VF4A-E Datasheet - Page 43

• Manufacturer Part Number: LC89057W-VF4A-E
• Description: Digital Audio Interface Transceiver
• Manufacturer: SANYO [Sanyo Semicon Device]

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When the oscillation amplifier is set to the permanent continuous operation mode with AMPOPR[1:0] or fs changes
To input data to SDIN, select a clock synchronized with the SDIN input data.
The XIN source can be switched while maintaining the PLL locked status. However, since switching between clock
If the oscillation amplifier is set to stop automatically when the PLL gets locked, XIN source switching from the PLL
are set not to be reflected to the error flag with FSERR, OCKSEL and RCKSEL can switch the clock source while
maintaining the RERR status. However, if none of these settings is made, RERR outputs an error once when switching
occurs.
and data output can be set independently, it is recommended to select mute or SDIN data for the output data when
XIN source is switched.
locked status is executed after the oscillation is stabilized. Moreover, switching of output data at this time is subject to
XIN source switching.
SELMTD
OCKSEL
RCKSEL
RDTSEL
RDTSTA
RDTMUT
CCB address: 0xE8; Command address: 5; Demodulation function: Clock source; RDATA output setting
DI15
DI7
0
0
RDTMUT
DI14
DI6
1
Setting of output clock source switching method
0: Switch R system and S system simultaneously according to OCKSEL (initial value)
1: Switch R system according to RCKSEL and fix S system to XIN source
Clock source setting when SELMTD = 0
0: Use XIN clock as source while PLL is unlocked (initial value)
1: Use XIN clock as source regardless of PLL status
Clock source setting when SELMTD = 1
0: Use XIN clock as source while PLL is unlocked (initial value)
1: Use XIN clock as source regardless of PLL status
RDATA output setting while PLL is unlocked
0: Output SDIN data while PLL is unlocked (initial value)
1. Mute while PLL is unlocked
RDATA output setting
0: According to RDTSEL (initial value)
1: Output SDIN input data regardless of PLL status
RDATA mute setting
0: Output data selected with RDTSEL
1: Muted
RDTSTA
DI13
DI5
0
LC89057W-VF4A-E
RDTSEL
DI12
DI4
1
DI11
DI3
0
0
RCKSEL
DI10
DI2
0
OCKSEL
CAU
DI1
DI9
SELMTD
CAL
DI0
DI8
No.7202-43/59