M38197 Mitsubishi, M38197 Datasheet - Page 24

• Manufacturer Part Number: M38197
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
• Manufacturer: Mitsubishi

Fig. GA-2 Structure of serial I/O control registers
24
b7
b7
Note: When the external clock is selected in the serial I/O1 automatic transfer mode, the S
: Valid only in serial I/O automatic transfer mode.
b0
b0
Serial I/O1 control register
(SIO1CON(SC1) : address 0019
Internal synchronous clock selection bits
Serial I/O1 port selection bit (P6
S
Transfer direction selection bit
Synchronous clock selection bit
P6
Serial I/O3 control register
(SIO3CON(SC3) : address 001E
Internal synchronous clock selection bits
Serial I/O3 port selection bit (P5
S
Transfer direction selection bit
Synchronous clock selection bit
P5
RDY1
RDY3
b2 b1 b0
b2 b1 b0
0 0 0 : f(X
0 0 1 : f(X
0 1 0 : f(X
0 1 1 : f(X
1 1 0 : f(X
1 1 1 : f(X
0 : I/O port
1 : S
0 : I/O port
1 : S
0 : LSB first
1 : MSB first
0 : External clock
1 : Internal clock
0 : CMOS output (in output mode)
1 : N-channel open-drain output
0 0 0 : f(X
0 0 1 : f(X
0 1 0 : f(X
0 1 1 : f(X
1 1 0 : f(X
1 1 1 : f(X
0 : I/O port
1 : S
0 : I/O port
1 : S
0 : LSB first
1 : MSB first
0 : External clock
1 : Internal clock
0 : CMOS output (in output mode)
1 : N-channel open-drain output
5
5
/S
/S
(in output mode)
(in output mode)
OUT1
OUT3
output selection bit (P6
output selection bit (P5
OUT1
RDY1
OUT3
RDY3
P-channel output disable bit
P-channel output disable bit
,S
/CS output pin (Note)
and S
and S
CLK11
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
)/8 or f(X
)/16 or f(X
)/32 or f(X
)/64 or f(X
)/128 or f(X
)/256 or f(X
)/8 or f(X
)/16 or f(X
)/32 or f(X
)/64 or f(X
)/128 or f(X
)/256 or f(X
CLK3
CLK3
,and S
output pins
output pins
CLK12
CIN
CIN
CIN
CIN
CIN
CIN
CIN
CIN
CIN
CIN
CIN
CIN
)/8
)/8
)/16
)/32
)/64
)/16
)/32
)/64
7
7
)
)
)/128
)/256
)/128
)/256
5
5
output pins
16
16
, P6
and P5
)
)
6
, and P6
6
)
7
)
b7
RDY1
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
signal pin becomes the CS signal input pin.
b0
MITSUBISHI MICROCOMPUTERS
Serial I/O2 control register
(SIO2CON(SC2) : address 001D
Internal synchronous clock selection bits
Serial I/O2 port selection bit (P5
S
Transfer direction selection bit
Synchronous clock selection bit
P5
RDY2
b2 b1 b0
0 0 0 : f(X
0 0 1 : f(X
0 1 0 : f(X
0 1 1 : f(X
1 1 0 : f(X
1 1 1 : f(X
0 : I/O port
1 : S
0 : I/O port
1 : S
0 : LSB first
1 : MSB first
0 : External clock
1 : Internal clock
0 : CMOS output (in output mode)
1 : N-channel open-drain output
1
/S
(in output mode)
OUT2
output selection bit (P5
OUT2
RDY2
P-channel output disable bit
and S
output pin
IN
IN
IN
IN
IN
IN
)/8 or f(X
)/16 or f(X
)/32 or f(X
)/64 or f(X
)/128 or f(X
)/256 or f(X
CLK2
3819 Group
output pins
CIN
CIN
CIN
CIN
CIN
CIN
)/8
)/16
)/32
)/64
3
)
)/128
)/256
1
16
, and P5
)
2
)