M38197 Mitsubishi, M38197 Datasheet - Page 29

• Manufacturer Part Number: M38197
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
• Manufacturer: Mitsubishi

(2.4) When Selecting the External Clock
When selecting the external clock, the internal clock and the set-
ting of transfer interval with the serial I/O automatic transfer
interval register are invalid, but the serial I/O output pin S
the internal transfer clock can be controlled from the outside by
setting the S
When the CS input is “L”, the S
clock are enabled.
When the CS input is “H”, the S
state and the internal transfer clock goes to “H”.
Select the function of the P6
registers (refer to Table GA-2):
Switch the CS pin from “L” to “H” or from “H” to “L” during “H” of the
transfer clock (S
When selecting the external clock, set the external clock to “L” af-
ter 9 cycles or more of the internal clock
bit. After transferring 1-byte data, leave 11 cycles or more of the
internal clock
Fig. GA-10 Timing during serial I/O automatic transfer (external clock selected)
the bit 4 (SC1
register
the bit 0 (SIOAC
register
RDY1
Bit 1 write signal of serial I/O
automatic transfer control
register
free for the transfer interval.
Bit 1 of serial I/O automatic
transfer control register
Write signal from RAM to
serial I/O1 register
Write signal from serial I/O1
register to RAM
CLK11
4
) and the bit 6 (SC1
pin to the CS (input) pin.
0
) of the serial I/O automatic transfer control
input) after transferring 1-byte data.
Serial I/O output
Serial I/O input
7
Transfer clock
/S
External input
Transfer clock
Data pointer
RDY1
OUT1
OUT1
S
CLK
(internal)
/CS/S
S
input
pin and the internal transfer
pin goes to high impedance
6
S
OUT
CS
) of the serial I/O1 control
IN
CLK12
after setting the start
n
with the following
X
DO
DI
0
0
OUT1
DO
DI
1
1
and
DO
DI
2
2
DO
DI
3
3
When not using the CS input, note that the S
high impedance state, even after transfer is completed.
When not using the CS input, or when CS is “L”, control the exter-
nal clock because the data in the serial I/O register will continue to
shift while the external clock is input, even after the completion of
automatic transfer (Note that the automatic transfer interrupt re-
quest bit is set and the bit 1 of the serial I/O automatic transfer
register is cleared at the point when the specified number of bytes
of data have been transferred.)
Table GA-2. P6
Note : SC1
DO
DI
4
4
SC1
DO
0
DI
SC1
SIOAC
6
5
5
DO
DI
4
6
: S
: Synchronous clock selection bit
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
6
0
6
: Automatic transfer control bit
RDY1
SC1
DO
DI
0
1
7
7
7
/S
Note: Data marked with X is invalid.
output selection bit
4
RDY1
n-1
MITSUBISHI MICROCOMPUTERS
SIOAC
/CS selection
X
0
1
0
X
X
3819 Group
P6
X
7
OUT
/S
S
P6
RDY1
CS
RDY1
X
pin will not go to
7
/CS
29