HMS87C5216 ETC1 [List of Unclassifed Manufacturers], HMS87C5216 Datasheet - Page 51

• Manufacturer Part Number: HMS87C5216
• Description: CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER FOR UR(Universal Remocon) & WIRELESS KEYBOARD
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

13.2 INTERRUPT CONTROL REGISTER
I flag of PSW is a interrupt mask enable flag. When I flag = ``0``,
all interrupts become disable. When I flag = ``1``, interrupts can
be selectively enabled and disabled by contents of corresponding
Interrupt Enable Register. When interrupt is occured, interrupt re-
quest flag is set, and Interrupt request is detected at the edge of
interrupt signal. The accepted interrupt request flag is automati-
13.3 INTERRUPT ACCEPT MODE
The interrupt priority order is determined by bit (IM1, IM0) of
SEP. 2004 Ver 1.01
IRQL
IENL : INTERRUPT ENABLE REGISTER LOW
IENH : INTERRUPT ENABLE REGISTER HIGH
IRQL : INTERRUPT REQUEST REGISTER LOW
IRQH : INTERRUPT REQUEST REGISTER HIGH
IRQH
IENH
IENL
Hardwar
Interrupt
e
KSCNE
KSCNE
-
-
non-maskable
maskable
Mask
-
WDTR
WDTR
INT1R
INT1E
Priority
INT2R
INT2E
Table 13-1 Interrupt Priority & Source
BITE
BITE
0
1
2
3
4
5
6
7
-
-
RST (RESET pin)
KSCNR (Key Scan)
INT1R (External Interrupt1)
INT2R (External Interrupt2)
T0R (Timer0)
T1R (Timer1)
T2R (Timer2)
WDTR (Watctdog Timer)
BITR (Basic Interval Timer)
BRK instruction
-
-
-
-
Interrupt Source
T0E
T0R
-
-
cally cleared during interrupt cycle process. The interrupt request
flag maintains ``1`` until the interrupt is accepted or is cleared in
program. In reset state, interrupt request flag register (IRQH,
IRQL) is cleared to ``0``. It is possible to read the state of inter-
rupt register and to mainpulate the contents of register and to gen-
erate interrupt. (Refer to software interrupt).
IMOD register.
T1E
T1R
-
-
INT Vector High
FFDF
FFFF
FFFB
FFF9
FFF7
FFF3
FFF1
FFEF
FFE9
FFE7
T2E
T2R
-
-
-
-
-
-
INT Vector Low
FFFE
FFFA
FFEE
FFDE
FFF8
FFF6
FFF2
FFF0
FFE8
FFE6
R/W <00CCh>
R/W <00CFh>
R/W <00CEh>
R/W <00CDh>
HMS87C5216