EM78451AP EMC [ELAN Microelectronics Corp], EM78451AP Datasheet - Page 14

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EM78451AP

Manufacturer Part Number
EM78451AP
Description
8-Bit Microcontroller
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
EM78451
8-Bit Microcontroller
10 •
4.2 Special Purpose Registers
4.1.13 RF (PWP: Pulse width preset register)
PWP7~PWP0 are the bit sets of pulse width preset in advance for the desired baud
clock width.
4.1.14 R20~R3E (General Purpose Register)
RA~R1F, and R20~R3E (including Banks 0~3) are general-purpose registers.
4.1.15 R3F (Interrupt Status Register)
Bit 0 (TCIF) TCC timer overflow interrupt flag. Set as TCC overflow; flag cleared by
Bit 1 (EXIF) External interrupt flag. Set by falling edge on /INT pin, flag cleared by
Bit 2 (SPIIF) SPI interrupt flag. Set by completion of data transmission, flag cleared by
Bit 3 (TM1IF) Timer1 interrupt flag. Set by the comparator at Timer1 application, flag
Bits 2~7 are not used and read as “0”.
R3F can be cleared by instruction, but cannot be set by instruction.
IOCF is the interrupt mask register.
Note that to read R3F will result of "logic AND" of R3F and IOCF.
4.2.1
4.2.2
Address
Address
0x3F
/PHEN
0x0F
Internal data transfer, or instruction operand holding.
A non-addressable register.
7
software.
software
software.
cleared by software.
"1" means interrupt request, "0" means non-interrupt.
ISR/R3F
A (Accumulator)
CONT (Control Register)
Name
PWP/RF
Name
/INT
6
Bit 7
-
PWP7
Bit 7
5
-
Bit 6
PWP6
-
Bit 6
(This specification is subject to change without further notice)
4
-
Bit 5
PWP5
Bit 5
-
Bit 4
PAB
PWP4
Bit 4
3
Product Specification (V1.2) 05.27.2004
-
TM1IF
PWP3
Bit 3
Bit 3
PSR2
2
PWP2
SPIIF
Bit 2
Bit 2
PSR1
1
PWP1
Bit 1
Bit 1
EXIF
PSR0
PWP0
Bit 0
0
Bit 0
TCIF

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