EM78451AP EMC [ELAN Microelectronics Corp], EM78451AP Datasheet - Page 28
EM78451AP
Manufacturer Part Number
EM78451AP
Description
8-Bit Microcontroller
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
1.EM78451AP.pdf
(54 pages)
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EM78451
8-Bit Microcontroller
24 •
Bit 2 (SPIIE) SPI interrupt enable bit.
Bit 1 (EXIE) EXIF interrupt enable bit.
Bit 0 (TCIE) TCIF interrupt enable bit.
Table 3 Related Status/data Registers of the SPI Mode
SPIRB: SPI Read Buffer. Once the serial data is received completely, it will load to
SPIWB: SPI Write Buffer. As transmitted data is loaded, the SPIS register stands by
SPIS: SPI Status register
TM1IF (bit4): Timer1 interrupt flag.
OD3 (bit 3): Open-Drain Control bit (P93)
OD4 (bit 2): Open-drain Control bit (P94)
RBFIF (bit 1): Read Buffer Full Interrupt flag
Address
0X0A
0x0C
0x0B
0: disable SPI interrupt
1: enable SPI interrupt
0: disable EXIF interrupt
1: enable EXIF interrupt
0: disable TCIF interrupt
1: enable TCIF interrupt
1 = Open-drain enable for SDO,
0 = Open-drain disable for SDO.
1 = Open-drain enable for SCK,
0 = Open-drain disable for SCK.
1 = Receive is completed, SPIB is full, and an interrupt occurs if enabled.
0 = Receive is ongoing, SPIB is empty.
SPIRB from SPISR. The RBF bit and the RBFIF bit in the SPIS register will
also be set.
and starts to shift the data when sensing SCK edge with SSE set to “1”.
SPIWB/RB SWB7
SPIRB/RA
SPIS/RC
Name
SRB7
Bit 7
0
SWB6
SRB6
Bit 6
0
(This specification is subject to change without further notice)
SWB5
SRB5
Bit 5
0
SWB4
TM1IF
SRB4
Product Specification (V1.2) 05.27.2004
Bit 4
SWB3
SRB3
Bit 3
OD3
SWB2
SRB2
Bit 2
OD4
SWB1 SWB0
RBFIF
SRB1
Bit 1
SRB0
Bit 0
RBF
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