EM78451AP EMC [ELAN Microelectronics Corp], EM78451AP Datasheet - Page 26

• Manufacturer Part Number: EM78451AP
• Description: 8-Bit Microcontroller
• Manufacturer: EMC [ELAN Microelectronics Corp]

EM78451
8-Bit Microcontroller
22 •
SCK/P94 (Pin 9):
/SS/P95 (Pin 10):
4.5.4
The related registers for defining SPI mode are shown in Table 2 and 3.
Table 2 Related Control Registers of the SPI Mode
SPIE (bit 6): SPI Enable bit
SPIC: SPI Control Register.
CES (bit 7): Clock Edge Select bit
Address
0x0D
0x0F
Serial Clock
Generated by a master device
Synchronize the data communication on both the SDI and SDO pins
The CES (located in Register 0x0D) is used to select the edge to communicate
The SBR0~SBR2 (located in Register 0x0D) is used to determine the baud rate of
The CES, SBR0, SBR1, and SBR2 bit have no effect in the slave mode
Timing is show in Fig.13 and 14
Slave Select; negative logic,
Generated by a master device to signify the slave(s) to receive data,
Goes low before the first cycle of SCK appears and remains low until the last
Ignores the data on the SDI and SDO pins when /SS is high, because the SDO is
Timing is shown in Fig.13 and Fig. 14.
communication
(eighth) cycle is completed,
no longer driven.
1 = Data shifts out on falling edge, and shifts in on rising edge. Data is on hold
during the high level.
0 = Data shifts out on rising edge, and shifts in on falling edge. Data is on hold
during the low level.
1 = Enable SPI mode
0 = Disable SPI mode
Programming the related registers
INTC/IOCF
*SPIC/RD
Name
Bit 7
CES
--
SPIE
Bit 6
--
(This specification is subject to change without further notice)
Bit 5
SRO
--
Product Specification (V1.2) 05.27.2004
Bit 4
SSE
--
TM1IE
Bit 3
--
SBR2
SPIIE
Bit 2
SBR1
EXIE
Bit 1
SBR0
TCIE
Bit 0