EM78P153EN EMC [ELAN Microelectronics Corp], EM78P153EN Datasheet - Page 22

• Manufacturer Part Number: EM78P153EN
• Description: EM78P153E is an 8-bit microprocessor with low-power and high-speed CMOS technology
• Manufacturer: EMC [ELAN Microelectronics Corp]

This specification is subject to change without prior notice.
4.6 Interrupt
The EM78P153E has three falling-edge interrupts as listed below:
Before the Port 6 Input Status Changed Interrupt is enabled, reading Port 6 (e.g. "MOV R6,R6") is
necessary. Each pin of Port 6 will have this feature if its status changes. Any pin configured as output or
P60 pin configured as /INT, is excluded from this function. The Port 6 Input Status Changed Interrupt
can wake up the EM78P153E from sleep mode if Port 6 is enabled prior to going into the sleep mode by
executing SLEP instruction. When the chip wakes-up, the controller will continue to execute the
program in-line if the global interrupt is disabled. If the global interrupt is enabled, it will branch to the
interrupt vector 008H.
RF is the interrupt status register that records the interrupt requests in the relative flags/bits. IOCF is an
interrupt mask register. The global interrupt is enabled by the ENI instruction and is disabled by the DISI
instruction. When one of the interrupts (enabled) occurs, the next instruction will be fetched from
address 008H. Once in the interrupt service routine, the source of an interrupt can be determined by
polling the flag bits in RF. The interrupt flag bit must be cleared by instructions before leaving the
interrupt service routine and before interrupts are enabled to avoid recursive interrupts.
The flag (except ICIF bit) in the Interrupt Status Register (RF) is set regardless of the status of its mask
bit or the execution of ENI. Note that the outcome of RF will be the logic AND of RF and IOCF (refer to
Fig. 11). The RETI instruction ends the interrupt routine and enables the global interrupt (the execution
of ENI).
When an interrupt is generated by the INT instruction (enabled), the next instruction will be fetched from
address 001H.
(1) TCC overflow interrupt
(2) Port 6 Input Status Change Interrupt
(3) External interrupt [(P60, /INT) pin].
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EM78P153E
OTP ROM
2002/03/01