EM78P153EN EMC [ELAN Microelectronics Corp], EM78P153EN Datasheet - Page 32

• Manufacturer Part Number: EM78P153EN
• Description: EM78P153E is an 8-bit microprocessor with low-power and high-speed CMOS technology
• Manufacturer: EMC [ELAN Microelectronics Corp]

This specification is subject to change without prior notice.
0 0000 0000 0000
0 0000 0000 0001
0 0000 0000 0010
0 0000 0000 0011
0 0000 0000 0100
0 0000 0000 rrrr
0 0000 0001 0000
0 0000 0001 0001
0 0000 0001 0010
0 0000 0001 0011
0 0000 0001 0100
0 0000 0001 rrrr
0 0000 01rr rrrr
0 0000 1000 0000
0 0000 11rr rrrr
0 0001 00rr rrrr
0 0001 01rr rrrr
0 0001 10rr rrrr
0 0001 11rr rrrr
0 0010 00rr rrrr
INSTRUCTION BINARY
The Case (A) is selected by the CODE Option bit, called CLK. One instruction cycle will consist of two
oscillator clocks if CLK is low, and four oscillator clocks if CLK is high.
The Case (B) is selected by another CODE Option bit, called CYES. Execution of the instructions listed
in Case (B) takes one instruction cycle if CYES is low, and takes two instruction cycles if CYES is high.
Case (A) and Case (B) are independent options, that is, they can be selected separately. Note that once
the 4 oscillator periods within one instruction cycle is selected under Case (A), the internal clock source
to TCC will be CLK=Fosc/4 (not Fosc/ 2) as illustrated in Fig. 5.
In addition, the instruction set has the following features:
The symbol "R" represents a register designator that specifies which one of the registers (including
operational registers and general purpose registers) is to be utilized by the instruction. "b" represents a
bit field designator that selects the value for the bit which is located in the register "R", and affects the
operation. "k" represents an 8 or 10-bit constant or literal value.
(B) Execute within two instruction cycles the "JMP", "CALL", "RET", "RETL", "RETI" commands, or
the conditional skip ("JBS", "JBC", "JZ", "JZA", "DJZ", "DJZA") which were tested to be true. The
instructions that are written to the program counter, should also take two instruction cycles.
(1) Every bit of any register can be set, cleared, or tested directly.
(2) The I/O register can be regarded as general register. That is, the same instruction can operate
on I/O register.
0000
0001
0002
0003
0004
0010
0011
0012
0013
0014
0080
HEX
000r
001r
00rr
00rr
01rr
01rr
01rr
01rr
02rr
MNEMONIC
MOV R,A
CONTW
SUB A,R
SUB R,A
DECA R
CONTR
OR A,R
DEC R
WDTC
IOW R
CLR R
IOR R
CLRA
SLEP
RETI
NOP
DAA
RET
DISI
ENI
[Top of Stack]
32
0
[Top of Stack]
Decimal Adjust A
Disable Interrupt
WDT, Stop oscillator
Enable Interrupt
OPERATION
No Operation
A
A
CONT
A
IOCR
0
R-A
R-A
R-1
R-1
A
0
0
VR
PC, Enable Interrupt
CONT
IOCR
WDT
R
R
A
R
R
A
A
A
A
A
PC
EM78P153E
STATUS AFFECTED
None <Note1>
None <Note1>
Z,C,DC
Z,C,DC
OTP ROM
None
None
None
None
None
None
None
None
T,P
T,P
C
Z
Z
Z
Z
Z
2002/03/01